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Registered: ‎09-10-2018

PS independent DMA

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Hi,

 

Is there a way to save data to the set DDR memory location without PS participating in this process (only with PL resources)?

My understanding is that DMA block can't do it.

 

Cheers,

Anton

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Registered: ‎09-10-2018

Re: PS independent DMA

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I managed to solve this problem without using dma at all. 

Data can be saved to DDR memory by directly connecting block with AXI master interface to the HP slave port of zynq. In this case PS is not participating in memory access problem at all.

 

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842503/Zynq-7000+AP+SoC+-+Read+and+Write+to+the+Zynq+OCM+from+The+PL

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Registered: ‎07-31-2012

Re: PS independent DMA

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Hi u6113500@anu.edu.au,

 

Use AXI DMA for this purpose i.e. to bypass PS for data transfer.

 

Regards

Praveen


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Registered: ‎09-10-2018

Re: PS independent DMA

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Thats what I am doing. My understanding is that AXI DMA still requires initialisation from PS side. 

 
The very simple idea of my project:
1) Reserve 2 certain DDR memory blocks: Block1 0x0000_0000 to 0x0000_0FFF
                                                                    Block2 0x0100_0000 to 0x0100_0FFF
2) Stream 2 different counters to there memory blocks from PL. When the memory block is full -> start overwriting old data (FIFO type)
3) Read these registers in PS
 
I did the overlay with DMA and I can run this example: http://www.fpgadeveloper.com/2014/08/using-the-axi-dma-in-vivado.html
The question is how to control DMA when I only read data from it on PS side and all the writing happens on PL side.
 
 
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Registered: ‎09-10-2018

Re: PS independent DMA

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I managed to solve this problem without using dma at all. 

Data can be saved to DDR memory by directly connecting block with AXI master interface to the HP slave port of zynq. In this case PS is not participating in memory access problem at all.

 

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842503/Zynq-7000+AP+SoC+-+Read+and+Write+to+the+Zynq+OCM+from+The+PL

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