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Observer 6l20
Observer
4,177 Views
Registered: ‎04-07-2014

PS to PL interrupt port size problem

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Hi all,

 

on Vivado 2014-1 (but it was the case for previous version), I'm trying to connect 2 interrupts to PS.

In the processing system configuration, under interrupt, I have enabled "Fabric interrupt" and "IRQ_F2P[15:0]" under PL-PS part, as following:

INT sel.jpg

 

So my understanding is that I should have 16 interrupts lines available from PL part.

But when validating these setting, I got only a 1 bit interrupt vector available :

INT_system.jpg

 

If I try to connect many interrupts or a 2-bits interrupt vector outgoing of my custom-IP, I have a warning of size mismatch at the synthesis that tells me that only the LSB will be connected, others will be left unconnected.

 

Is there something else to configure to have more than 1 PL-PS interrupt ?

Thanks for your help.

 

Regards,

Sylvain

 

 

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1 Solution

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Scholar sampatd
Scholar
5,360 Views
Registered: ‎09-05-2011

Re: PS to PL interrupt port size problem

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You will need to use the concat IP to connect more than 1 PL-PS interrupt.

Follow the steps mentioned in the AR below, and you should be good to go:
http://www.xilinx.com/support/answers/58942.html

View solution in original post

4 Replies
Scholar sampatd
Scholar
5,361 Views
Registered: ‎09-05-2011

Re: PS to PL interrupt port size problem

Jump to solution
You will need to use the concat IP to connect more than 1 PL-PS interrupt.

Follow the steps mentioned in the AR below, and you should be good to go:
http://www.xilinx.com/support/answers/58942.html

View solution in original post

Observer 6l20
Observer
4,148 Views
Registered: ‎04-07-2014

Re: PS to PL interrupt port size problem

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Hello sampatd,

 

thanks a lot for your reply, it works fine.

 

Regards

Sylvain

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Visitor jms_on_x
Visitor
4,113 Views
Registered: ‎05-20-2014

Re: PS to PL interrupt port size problem

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Hello sampatd,

I have seen your reply to this issue a few times (links below).  My question is, what if I am instantiating the ps7 instance in RTL.  After customizing the PS7 IP from the IP catalog and then generating the IP, the .VEO file contains the line:

  .IRQ_F2P(IRQ_F2P),                                    // input wire [0 : 0] IRQ_F2P

 

How can I connect a 16-bit input bus to this port?  If I instantiated a concatenation module in RTL, I don't see how it would fix or affect the sizing of the IRQ_F2P port on the PS7 instance.

 

Thanks for your help,

-- Joel

 

 

 

http://forums.xilinx.com/t5/Embedded-Processor-System-Design/Where-is-16-bit-shared-interrupt-port-IRQ-F2P-15-0/m-p/353845/highlight/true#M9378

 

http://www.xilinx.com/support/answers/55703.htm

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Contributor
Contributor
454 Views
Registered: ‎04-19-2016

Re: PS to PL interrupt port size problem

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For RTL you can set the following property on the IP through TCL, you can't do it in the customisation GUI:

set_property CONFIG.PCW_NUM_F2P_INTR_INPUTS {16[get_ips processing_system7_0]
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