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Visitor mosalem2003
Visitor
8,104 Views
Registered: ‎09-27-2007

PowerPC Embedded SATA Host


I am building a complete SATA storage Host controller embedded system based on a custom board which has Xilinx Virtex II PRO XC2VP40. The board has an off-chip DDR SODIMM and a SERDES chip that is connected to one bank of the FPGA. The controller of SATA has an interface to PLB from one side as a slave for the register interface programming to be mastered by the powerpc and from another side as a PLB master to master a Xilinx memory controller that can control the external off-chip DDR SODIMM memory card - this memory part of the board is identical to Xilinx Avnet board. I know there is application note about SATA from xilinx but it is not instructive at all for me xapp716 -- is there also files available to reproduce it in lab ?…. I am wondering about how to integrate our host controller to the system as I am not to use an IPIF as already we built the wrappers from our core to the PLB one as master side and one as slave side /// then how can we define a memory map for these interfaces of the controller as they are part of the I/Os of the SATA host , they are not separate in different peripheral…  … also how can I define my custom board properly for EDK … also how can I complete the parts of the system for sake of simulation … as u know I will need to have models for the physical layers and also a BFM for a SATA Hard disk drive to simulate the operation of HW/ SW /// is this doable by generation of simulation models that can integrated in a verilog verification environment under modelsim… ? … I have all my HW components in place but I need to know how to stitch them together and also build the whole system for simulation and verification before downloading to the chip and start software debugging for the whole system

I will appreciate ur soonest help so much ….

Thanks

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