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Visitor ovelzyg
Visitor
4,034 Views
Registered: ‎11-24-2011

PowerPC freezes (Unable to stop PowerPC) in weird situations in Xilinx SDK 13.1

Hi Guys,

 

I am using Xilinx SDK 13.1 with a Digilent XUP JTAG-USB Cable to work on my Virtex-5 FX70T FPGA chip (Board: HTG-V5-PCIE2).

 

I am seeking your assistance in an issue that causes my PowerPC to freeze.

 

 

Eg.1 With the code below, the PowerPC freezes (When I manually stop the process to exit it, I get the dreaded "Unable to Stop PowerPC processor" error).

 

int main() {

     init_platform();

     print("Hello World\n");

     cleanup_platform();

     return 0;

}

 

Eg.2 However, with the code below the PowerPC runs properly and exits.

 

int main() {

     init_platform();

     //print("Hello World\n"); //Code runs fine when print() is commented out

     cleanup_platform();

     return 0;

}

 

Eg.3 Only with the code below, I am able to print() something on my terminal (via JTAG UART).

 

int main() {

     //init_platform();

     print("Hello World\n"); //"Hello World" gets displayed on my terminal

     cleanup_platform();

     return 0;

}

 

 

Eg.4 Weirdly, this code freezes the PowerPC ! Nothing is displayed on the terminal.

 

//Using a method to do the printing. This code is logically similar to the code above.

void test() {

     print("B\n");

}

 

int main() {

     //init_platform();

     test(); //Call to the method defined above

     cleanup_platform();

     return 0;

}

 

 

Eg.5 But this works without freezing the PowerPC.

 

void test() {

     //An Empty method

}

 

int main() {

     //init_platform();

     test(); //Call to the method defined above

     cleanup_platform();

     return 0;

}

 

 

Eg.6 And very weirdly, the PowerPC freezes again with this code ! Nothing is displayed on the screen.

 

int main() {

     //init_platform();

     print("Hello World\n");

     print("A\n");   //This is an additional print() statement

     cleanup_platform();

     return 0;

}

 

Eg.7 And even more weirdly, the PowerPC works with this code ! .

 

int main() {

     //init_platform();

     print("Hello World\n");

     int i = 0;  //An assignment statement in between the print()-statements makes this code work!!

     print("A\n");   //This is an additional print() statement

     cleanup_platform();

     return 0;

}

 

I am not sure why this is happening. What can I do to debug this problem?

 

 

By the way, briefly this is how my lscript.ld looks like:

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;

_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400;

 

MEMORY

{

xps_bram_if_cntlr_1 : ORIGIN = 0xFFFF0000, LENGTH = 0x0000FF00

DDR2_SDRAM_MEM_BASEADDR : ORIGIN = 0x00000000, LENGTH = 0x20000000

}

 

I have an on-board 512MB DDR2 RAM and had allocated 64KB for the BRAM in the BSB.

For the purpose of testing, I have used "> xps_bram_if_cntlr_1" for all the sections in the lscript.

 

 

Thanks for reading my post and thanks in advance for the help Guys !

 

 

 

~Susanth

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2 Replies
Moderator
Moderator
4,005 Views
Registered: ‎11-10-2010

Re: PowerPC freezes (Unable to stop PowerPC) in weird situations in Xilinx SDK 13.1

Do you see any difference if you move the program to DDR in the linker instead? 1k heap and stack should work fine, which is odd. Have you tried xil_printf() as well?
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Visitor ovelzyg
Visitor
3,979 Views
Registered: ‎11-24-2011

Re: PowerPC freezes (Unable to stop PowerPC) in weird situations in Xilinx SDK 13.1

Yes, it is the same even if I move the program to DDR. The "Unable to Stop PowerPC" error arises.

xil_printf() gives the same problem as well.

 

However, when I leave my whole program in BRAM and change the cache_region_mask variable found in the init_platform() function to 0xfff0000 (BRAM's starting address) the code supposedly works and I am not sure why.

 

The default values that my Xilinx SDK creates for cache_region_mask is normally 0xc0000001or 0xf0000001. However, both these addresses do not map to the BRAM or DDR2. So, I am not sure if we are supposed to use these default values.

 

That leads me to ask, should the cache_region_mask be left as the default value Xilinx SDK generates OR should I change it to a region in BRAM?

 

Thanks!

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