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Contributor
Contributor
4,500 Views
Registered: ‎07-10-2013

Problem on using axi_ethernet

Hi,


While testing the xaxiethernet_example_intr_fifo on KC705 and VC707 boards we discovered that the MgtRdy bit of the Interrupt Status Register of the AXI Ethernet IP does not go to '1'. This means the serial transceiver is not ready to be used. Increasing the loop count waiting for MgtRdy going high also doesn't change anything.

The problem occures in Vivado2014.3 (axi_ethernet v6.2). In V2013.4 (axi_ethernet v6.0) everything seems to work OK on the same boards.

The part of the block diagram is below:

 

axi_eth.jpg

 

Have we forgot about something?

Should the mac_irq signal be served by interrupt controller ?

 

Regards,

Pawel

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Visitor jeromefievet
Visitor
569 Views
Registered: ‎02-02-2010

Re: Problem on using axi_ethernet

Hi Pawel,

 

I have the same issue with Vivado 2016.4 ...

Have you fixed it?

 

Regards,

Jérôme

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