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Explorer
Explorer
7,205 Views
Registered: ‎05-07-2013

Required generic PLB(Processor Local Bus) to AXI/APB bridge.

Hi,

 

           I want a generic PLB(Processor Local Bus) to AXI/APB bridge.

 

          VHDL code of Xilinx Logic core does not support Virtex 5 FPGA. So I want generic  PLB(Processor Local Bus) to AXI/APB bridge.

 

 

Thank You.

 

 

-----VIshal Patel

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Teacher muzaffer
Teacher
7,189 Views
Registered: ‎03-31-2012

Re: Required generic PLB(Processor Local Bus) to AXI/APB bridge.

try this: http://opencores.org/forum,Cores,0,4688

Maybe you can make a axi-wb-plb bridge. Or you can get someone to do it for you.
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