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Visitor
Visitor
4,578 Views
Registered: ‎06-01-2016

SEM IP goes to status_uncorrectable without injection

Hi everyone,

 

I am working with the ZC702 board and I want to use the SEM IP to inject fault in some design. I already worked with this IP on the Artix 7 Evalution Kit, but I can't make it work on this ZC702 Board

 

I followed the steps described here :

https://forums.xilinx.com/t5/Zynq-All-Programmable-SoC/SEM-IP-Zynq-Devices/m-p/590798/highlight/true#M6884

 

Here is my code to prove it :

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"

#include "sleep.h"


#define PCAP_position	27
#define ZY7_DEVCFG_CTRL_PCAP_PR	(1<<PCAP_position) //bit to deactivate to give ICAP

#include "xgpio.h"

XGpio Gpio_ICAP; /* icap_grant */

#define CHANNEL_GRANT		1


int setupGpio(void) {
    int status;
    XGpio_Config *gpioConfig_ICAP;

    gpioConfig_ICAP = XGpio_LookupConfig(XPAR_AXI_GPIO_0_DEVICE_ID);
    status = XGpio_CfgInitialize(&Gpio_ICAP, gpioConfig_ICAP, gpioConfig_ICAP->BaseAddress);
    if(status != XST_SUCCESS) {
        return status;
    }

    //Set icap_grant as output (for the zynq)
    XGpio_SetDataDirection(&Gpio_ICAP, CHANNEL_GRANT, 0);

    //Be sure that Icap_grant is at 0
    XGpio_DiscreteWrite(&Gpio_ICAP, CHANNEL_GRANT, 0);

    return XST_SUCCESS;
}

int main()
{
	int status;
	volatile unsigned int reset;
	volatile unsigned int ctrl;

    init_platform();


    status = setupGpio();
    if(status != XST_SUCCESS) {
    	xil_printf("ERREUR setupGpio !!!\r\n");
        return XST_FAILURE;
    }
    else {
    	xil_printf("setupGpio ok\r\n");
    }

    print("Hello World\n\r");


    XGpio_DiscreteWrite(&Gpio_ICAP, CHANNEL_GRANT, 0);


    sleep(2);

    xil_printf("Clearing PCAP_PR...\r\n");

    //Read bit 27 of register DEVCFG CTRL (cf PG036 p52)
    u32 BUS_PCAP = Xil_In32(XPAR_XDCFG_0_BASEADDR);
    xil_printf("BUS_PCAP = %0x\r\n", BUS_PCAP);

    xil_printf("ZY7_DEVCFG_CTRL_PCAP_PR = %0x\r\n", ZY7_DEVCFG_CTRL_PCAP_PR);

    u32 PCAP = (BUS_PCAP & ZY7_DEVCFG_CTRL_PCAP_PR);
    xil_printf("PCAP = %0x\r\n", PCAP);

    Xil_Out32(XPAR_XDCFG_0_BASEADDR, (BUS_PCAP & ~ZY7_DEVCFG_CTRL_PCAP_PR)); //write without pcap

    BUS_PCAP = Xil_In32(XPAR_XDCFG_0_BASEADDR); //2nd read to check
    xil_printf("BUS_PCAP modifie = %0x\r\n", BUS_PCAP);

    PCAP = (BUS_PCAP & ZY7_DEVCFG_CTRL_PCAP_PR);
    xil_printf("PCAP modifie = %0x (doit valoir 0)\r\n", PCAP);

    xil_printf("... SUCCESS\r\n\r\n");

    sleep(2);

    xil_printf("Setting ICAP...\r\n");

    XGpio_DiscreteWrite(&Gpio_ICAP, CHANNEL_GRANT, 1);

    xil_printf("...ICAP set\r\n");

    cleanup_platform();
    return 0;
}

When I run the code, the expected comportment is, following pdf PG036 and my experience on Artix7 :

 

status_initialization goes on and status_heart_beat starts

then status_initialization goes off and status_observation goes on

and then it waits here as long as you want

 

But in this case :

status_initialization goes on and status_heart_beat starts

then status_initialization goes off and status_observation goes on (so, here, everything is as expected)

and, really quickly, even if I don't do anything, it goes to status_uncorrectable

 

I'm not able to understand why.

If you have experienced it or if you have any idea, I would appreciate your help,

 

Thanks in advance,

Florian

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6 Replies
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Community Manager
Community Manager
4,566 Views
Registered: ‎07-23-2012

Re: SEM IP goes to status_uncorrectable without injection

Does reset helps in this case? Do you see this behavior consistently or is it intermittent?
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Visitor
Visitor
4,560 Views
Registered: ‎06-01-2016

Re: SEM IP goes to status_uncorrectable without injection

I see this every time I do it

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Xilinx Employee
Xilinx Employee
4,559 Views
Registered: ‎08-01-2008

Re: SEM IP goes to status_uncorrectable without injection

check this post
https://forums.xilinx.com/t5/Zynq-All-Programmable-SoC/SEM-IP-ZYBO/m-p/593376

Thanks and Regards
Balkrishan
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Visitor
Visitor
4,558 Views
Registered: ‎06-01-2016

Re: SEM IP goes to status_uncorrectable without injection

I already saw this post but I don't inject error. I even disable the Error Injection while instantiating the design just to be sure.
I also tried with the Error Injection enable and without injecting error just in case, but it was the same
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Scholar
Scholar
4,553 Views
Registered: ‎02-27-2008

Re: SEM IP goes to status_uncorrectable without injection

f,

 

Do you get a location for the upset?  What is it?

 

There is a (remote) possibility that you really do have a bad bit (all it takes is one bad - faulty or broken - bit).

 

Contact where you purchased it to get a replacement (if it is the case you have a bad bit, always the same one reported).  Such bad bits are extremely unlikely on newer production parts.  We see them (if at all) in the S phase of parts.  What is your date code?

 

Check the supply voltages.  Operation outside the recommended ranges may also be contributing the the issue.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Visitor
Visitor
4,540 Views
Registered: ‎06-01-2016

Re: SEM IP goes to status_uncorrectable without injection

Since you said that it could be a bad bit, I wanted to try on another FPGA. Luckily, a colleague could lend me a ZedBoard (it's the same FPGA, if I'm not mistaken?). I instantiate the same design with the same code, and the ZedBoard react exactly as expected (i.e. stays in observation mode).
So it seems that you were right suggesting my FPGA could be defective.

I will try to get a replacement.

 

Thank you everybody for your answers,

Florian

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