09-24-2010 10:41 PM
i wrote a program for SP605 Ebmedded Kit. The program have a ".bit" file and a ".elf" file. Now i am trying to load the files to FPGA. I can load the .bit file but i couldn't load the .elf file to FPGA. Because, after i load the .bit file, i must connect the board by using bash shell for loading the .elf file. However, it couldn't connect to FPGA. there is a error and the error:
"Error initializing: XMD failed to connect to remote target. Error::ERROR: MicroBlaze is under RESET. Check if the Reset input to MicroBlaze and its Bus Interfaces are connected properly UNABLE to STOP MicroBlaze."
How can i correct the problem? i couldn't load my program to FPGA...
09-26-2010 07:28 PM
If you use 12.1 or 12.2 BSB wizard to create a project for SP605 and try the same thing again, would it work? I would recommend keeping everything as default (program and hardware platform) and making sure you have a known working system first. Then you may try to run your own program on it.
Hope it helps.
-Yan Shun Li
10-18-2010 11:56 AM
i solved the connect problem. As elzinga says, i corrected the clock and resets pins and then the problem was solved. You benefit from the examples which Xilinx gaves you for the reset and clock pins. The problem will be solved.
03-17-2012 01:50 PM
Can you please send me the correct clock and reset pins to use,
I have the same problem