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Scholar golson
Scholar
11,010 Views
Registered: ‎04-07-2008

Use BSB and Merge to larger FPGA design

Hi,
  I would like to use Base System Builder to create a Microcontroller System as a component of a FPGA design.  Then I would like to merge this design into
a larger design where other parts of the design may be independent of the Microcontroller system.  More specifically,  I have a ML505 Board.  I am looking at
adding ethernet to the FPGA design.  I found these example designs using the Core Generator tools.  The Design is not targeting a particular board so there
is a requirement to develop a UCF file to add the Ethernet design to a ML505 board.  I would like to add a microcontroller to the FPGA design also.  But for the
time being I would add the independent ethernet design with the microcontroller design.  This might help integrate the FPGA into the ML505 board since a UCF
file is created for the micro part of the design.  I would have to add some new design parts to get the example design for the ethernet parts to work in the FPGA too.
 
How should I start.
 
Thank You,
  Gary Olson
 
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5 Replies
Scholar golson
Scholar
11,002 Views
Registered: ‎04-07-2008

Re: Use BSB and Merge to larger FPGA design

So Far, I have created a base band design.  I pulled out the system.v system_stub.v and NGC files that were in the implementation directory and created
a new XST design with these files in the project.  I implemented the XST design with place and route with no problems.  My next step is to add to the design.
I will create a new level of hierarchy above this design to add my other design example and include the UCF that was in the base band design.
 
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Adventurer
Adventurer
10,992 Views
Registered: ‎02-06-2008

Re: Use BSB and Merge to larger FPGA design

I believe you are taking the right approach by creating a hierarchical design to have 2 independent components. I have a silmilar design requirement, but I would like to know how I share logic between components. Say I have a simple input register in logic, some combinatorial logic, and an output register. How do I structure my VHDL design to have the microblaze read the input register and write to the output register?
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Scholar golson
Scholar
10,987 Views
Registered: ‎04-07-2008

Re: Use BSB and Merge to larger FPGA design

I take a guess at it.  I think I would use the GPIO in the IP catalog and add it to the design after you create a design using BSB.  This would be a port for inputs and outputs on the Microblaze system.
I am also trying to figure this out.  But I am going to try this above. 
 
By the way I am having some trouble creating two independent components because the ethernet MAC needs reset and clk.  I tried to share the sys_reset and sys_clk pins with both
modules.  But both modules are designed standalone, that is these independent modules create IBUFGs for the resets and clocks.  This causes errors during place and route.  a signal
can't have two IBUFGs is the error that I get.
 
 
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Xilinx Employee
Xilinx Employee
10,981 Views
Registered: ‎08-01-2007

Re: Use BSB and Merge to larger FPGA design

Is there a specific reason to generate EMAC from Coregen instead of using XPS_LL_TEMAC in EDK? If you add this core in BSB, it should wire up the clock and the reset outputs for you; which you could then connect to the PHY.
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Scholar golson
Scholar
10,979 Views
Registered: ‎04-07-2008

Re: Use BSB and Merge to larger FPGA design

I wanted to test the coregen example design.  However, the design was not setup for the ML505 board.  I thought I should try to learn how I might be able to integrate
independent logic, and a microcontroller together.  I also thought that the ML505 board must have a microcontroller on the board to set up the peripherals especially
the clock generation circuitry.  I don't think I can get the example design in coregen to work without a microcontroller to set up the board.
 
That is why I wanted both designs together.  And the Coregen design was set up to work in a loopback mode without a HOST interface so I could see if I can send and receive packets
through the Ethernet MAC
 
 
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