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Visitor legionexl
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2,197 Views
Registered: ‎12-15-2017

VDMA reference design for zcu102 evaluation kit?

Hi, 

 

Is there any working reference design of VDMA+HDMI rx/tx for zcu102 board? Like xapp1285 for the Zynq-7000 FPGAs. I'm new to SOC design and have no idea how to modify xapp1285 to make it work on zcu102.

 

Thanks for the help!

 

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Scholar hbucher
Scholar
2,185 Views
Registered: ‎03-22-2016

Re: VDMA reference design for zcu102 evaluation kit?

@legionexl Check this out

http://www.wiki.xilinx.com/HDMI+FrameBuffer+Example+Design

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Visitor legionexl
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2,165 Views
Registered: ‎12-15-2017

Re: VDMA reference design for zcu102 evaluation kit?

Thanks, hbucher. Thanks for your reply. But I did not find a link to download the related source code of this wiki. Could you please help to point it out?

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Scholar hbucher
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2,161 Views
Registered: ‎03-22-2016

Re: VDMA reference design for zcu102 evaluation kit?

@legionexl  It is there under "Reference Design Zip File"

But here is the link:

https://www.xilinx.com/member/forms/download/design-license.html?cid=27db97d5-0b2d-4489-8967-f550ca444545&filename=rdf0421-zcu102-base-trd-2017-2-rev2.zip

 

 

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zcu102_hdmi_download_zip.png
Moderator
Moderator
2,160 Views
Registered: ‎10-04-2017

Re: VDMA reference design for zcu102 evaluation kit?

@legionexl,

 

Xilinx recommends using the Video Frame Buffer Read and Video Frame Buffer Write

for reading from or writing to memory when using Video IP such as the Video Processing Subsystem.

For Zynq UltraScale+ MPSoC devices, the Video Codec Unit can properly encode and decode the video

data in memory.

 

The Wiki page that @hbucher pointed you to is a good starting point. Also check out the Video Design Hub located under the Design Hub View in the Xilinx Documentation Navigator. Here you will find the Video Product Guides.

 

Regards,

Sam

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Visitor legionexl
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2,156 Views
Registered: ‎12-15-2017

Re: VDMA reference design for zcu102 evaluation kit?

Many thanks! Let me check it out and try.

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Visitor legionexl
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2,154 Views
Registered: ‎12-15-2017

Re: VDMA reference design for zcu102 evaluation kit?

Thanks, @samk. The point of using Video Frame Buffer is great. I will try.

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Visitor legionexl
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2,066 Views
Registered: ‎12-15-2017

Re: VDMA reference design for zcu102 evaluation kit?

Hi, @samk @hbucher.  

 

I tried the HDMI rx tx ss passthrough design and it worked fine. Then I modified it by adding VDMA and a processing module (Sobel kernel obtained by HLS). I'm trying to use VDMA_0 S2MM to load HDMI rx frames to DDR memory, then use VDMA_1 MM2S to do Sobel processing. The processed frames will be sent back to DDR. Then VDMA_0 MM2S read the frames and send to HDMI tx.

 

When I run the SDK, the monitor shows nothing. Could you please have a look at the attached block diagram? Was I missing something? Really appreciate your comments.

 

 

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Scholar hbucher
Scholar
2,053 Views
Registered: ‎03-22-2016

Re: VDMA reference design for zcu102 evaluation kit?

@legionexl Notice that framebuffer is not the same as inline processing. It causes the input to be out of sync with the output, introduce tearing and an arbitrary amount of latency. It also makes the stream non-deterministic. 

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Moderator
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1,977 Views
Registered: ‎10-04-2017

Re: VDMA reference design for zcu102 evaluation kit?

Hi @legionexl,

 

Were you able to solve your issue or do you still have questions?

I have been away. Just in case this happens, if you have a new topic it is good to start another post as it will have more visibility in the forum!

 

-Sam

 

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Xilinx Video Design Hub
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Visitor legionexl
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936 Views
Registered: ‎12-15-2017

Re: VDMA reference design for zcu102 evaluation kit?

Hi @samk. Thanks for your response. Unfortunately, I did not make it work. I may continue this design in the future.
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