03-02-2017 06:44 AM
I would appreciate a general guidance on what i am trying to accomplish... which is to develop a custom IP that would accept as input a fullHD video frame through AXI4-Stream interface (HDMIinput->Video2AXIS -> CustomIP), perform corner detection and return the 400 most prevalent pixel corners coordinates. Since the output is no longer an image/frame can i use AXI4-Stream interface for the output (customIP-> AXI DMA S2MM->ZynqPS_HP0_port) or should i proceed with writing the results to AxiLite registers and access them through the driver form the ZynqPS software (customIP-> ZynqPS_GP0_port)?
any input appreciated
03-02-2017 07:41 AM
The AXI4-Stream protocol is for transmission of streaming data. If you plan to send your data continuously you can still use AXI4-Stream even if it is not for an video stream.
But it depends on what you want to do. Do you really need to stream the data? You can maybe just store the value in registers and use an AXI-Lite interface to read the values when you need it.
03-03-2017 09:29 PM
@vassalos as the other poster suggests, axi-stream is definitely usable here. But I have a different suggestion. I have implemented exactly what you are trying to do and my solution is to behave like vdma ie receive the stream and instead of writing the frame to memory (or in addition to it), write the thresholded nms points to a memory buffer given by the user-space directly through an axi-master interface.
03-06-2017 06:08 AM
03-06-2017 08:21 AM
@tzoumas when you say "faster" do you mean, code which runs faster or coding the solution faster?
in case code which runs faster, one thing you can notice is that you don't need the whole frame to start writing out points. You need only a certain number of rows of the image to detect your first points.
03-07-2017 02:26 PM
@muzaffer i was wandering if there is a faster way of handling the axi-stream control signals than generating them manually... Perhaps vivado has some functionality i'm not aware of... If not then its ok too... The important thing is that using AXIS, I can process an input frame (AXIS slave input) and produce something different than a frame (in my case some image features)...
If it comes down to using an AXI DMA for moving the data from/to CPU to/from FPGA, I should search how i can set the two different sizes in the DMA transactions (to the AXIS accelerator and from the AXIS accelerator)...right?