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Visitor daveylib
Visitor
4,435 Views
Registered: ‎08-08-2016

Validating project failure

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Hey guys!

 
My development board is Z-turn Kit MYS-7Z020-C.
I use Vivado 2014.4 on 64-bit Ubuntu 14.04 LTS.
 
I run `mys-xc7z020-arm-hdmi-xylon` project from CD disc from manufacturer.
 
The problem is that I got errors when I try to validate block design.
I use pure project and don't edit it.
After validate failure I can’t generate a bitstream.
 
When I use pure project and don’t try validating block design, then I can generate a bitstream.
 
In attachments I send you photos of the errors.
 
 
How can I solve my problems?
Excuse my English.
 
Sincerely,
Dawid Liberda
Screen Shot 2016-08-19 at 9.40.08 PM.png
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1 Solution

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Visitor daveylib
Visitor
8,232 Views
Registered: ‎08-08-2016

Re: Validating project failure

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I solved it! The problem was in regional settings. I set it to US and now everything is okay.

 

 

Fix to the problem in desktop entries:

Exec=gnome-terminal -e "bash -c 'export LC_NUMERIC=en_US.UTF-8 && sudo /opt/Xilinx/Vivado/2014.4/bin/vivado'"

 

 

 

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4 Replies
Community Manager
Community Manager
4,404 Views
Registered: ‎07-23-2012

Re: Validating project failure

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Did you make any modifications to the block design? If not, the project would have got corrupt.
Please try creating project from scratch and see if the problem persists.
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Xilinx Employee
Xilinx Employee
4,398 Views
Registered: ‎08-01-2008

Re: Validating project failure

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check if you are using the tool version for which design was created

you can download design files from here
http://www.xilinx.com/products/boards-and-kits/see-all-bk-device-family.html
Thanks and Regards
Balkrishan
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Visitor daveylib
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4,392 Views
Registered: ‎08-08-2016

Re: Validating project failure

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I'm sure the project is pure and I use correct tool version.

 

I guess the problem is in the licenses. I've got evaluation versions of licenses.

`mys-xc7z020-arm-hdmi-xylon` project uses logiCVC-ML in 3.02.a version and logiCLK in 1.02.b version.
 
logicBRICKS offers evaluation versions of these ip cores, but only with 1.0 version limit, and that's why I get the errors.
 
MYiR tech support confirms what I said here (^) and claims I have to buy licenses.
 
It's weird and annoying, because on the product website they've written they are using evaluation version of Xylon's logiCVC-ML and logiCLK ip core. http://www.myirtech.com/list.asp?id=502
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Visitor daveylib
Visitor
8,233 Views
Registered: ‎08-08-2016

Re: Validating project failure

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I solved it! The problem was in regional settings. I set it to US and now everything is okay.

 

 

Fix to the problem in desktop entries:

Exec=gnome-terminal -e "bash -c 'export LC_NUMERIC=en_US.UTF-8 && sudo /opt/Xilinx/Vivado/2014.4/bin/vivado'"

 

 

 

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