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Participant mubasheerahmed_12
Participant
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Registered: ‎08-22-2019

XC7K160T KINTEX 7

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Hi,

I am new to FPGAs and New for XILINX, i have question a very basic question may be but i felt like breaking my head. i have gone through some basics of FPGAs in that i found VCCO and i saw its an IO volatges, e.g., If my bank 1 VCCO connected with 3.3v then my volatage levels of Bank 1 IO will be between 3.3volts right.

so the question is, Can i connect bank1 VCCO_1 with 3.3v, bank2 VCCO_2 with 2.5v and bank3  VCCO_3 with 1volt just because i have different voltage levels of phiriperals connecting each bank can any expert answer my question.

thank you at the earliest

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1 Solution

Accepted Solutions
Scholar jg_bds
Scholar
605 Views
Registered: ‎02-01-2013

Re: XC7K160T KINTEX 7

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Separate banks on a Xilinx Kintex FPGA can have different IO voltages.

The XC7K160T has two different types of (standard IO) banks, High Performance (HP) and High Range (HR), in addition to GTX banks.

2019-09-17_5-48-17.gif

The allowable voltage ranges on these banks are different.

2019-09-17_5-50-04.gif

HP banks support voltages only up to 1.8V. So if you have peripherals that have an IO voltage above 1.8V (up to 3.3V), they need to use HR banks. 

-Joe G.

 

10 Replies
Scholar jg_bds
Scholar
606 Views
Registered: ‎02-01-2013

Re: XC7K160T KINTEX 7

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Separate banks on a Xilinx Kintex FPGA can have different IO voltages.

The XC7K160T has two different types of (standard IO) banks, High Performance (HP) and High Range (HR), in addition to GTX banks.

2019-09-17_5-48-17.gif

The allowable voltage ranges on these banks are different.

2019-09-17_5-50-04.gif

HP banks support voltages only up to 1.8V. So if you have peripherals that have an IO voltage above 1.8V (up to 3.3V), they need to use HR banks. 

-Joe G.

 

582 Views
Registered: ‎01-22-2015

Re: XC7K160T KINTEX 7

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-adding just a little to Joe's comments:

There is a bank-0 in the XC7K160T that is powered by VCCO_0 and whose pins are used for FPGA configuration.  Sometimes, bank-14 and bank-15 are used together with bank-0 for FPGA configuration.  When this occurs, there are special requirements for VCCO_0, VCCO_14, VCCO_15, and for the CFGBVS pin as described in and around Table 2-15 of UG470 (v1.13.1).

Mark

Participant mubasheerahmed_12
Participant
553 Views
Registered: ‎08-22-2019

Re: XC7K160T KINTEX 7

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Hi, TY for the answer, and i appreciate.

so it means we can not exceed more than the specified voltage in the HP banks and it means that we can connect upto 3.3v pheriperals for the four banks and upto 1.8v to two banks in XC7K160-fbg484 package, i am i right? if i am wrong  please dont hesitate to correct this noobe):-

and if my VCCO_14 is connected to my VCCO3.3v then what will be the high and low logic levels of my bank14 IOs. and will it be same with other banks?

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Scholar jg_bds
Scholar
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Registered: ‎02-01-2013

Re: XC7K160T KINTEX 7

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It's a tough time to be learning about FPGA's. When I started designing with them, everything you needed to know was in one or two documents, totalling a few hundred pages. Now, because of the high integration of complex subsystems into FPGA's--as well as the increased complexity of LUTs and interconnects--important information is scattered across dozens of documents, totalling thousands of pages.

The good news is you don't need to know all the information. You, however, will need to learn where to find the information.

As a newcomer, I would suggest that you do not try to design a custom board for an FPGA from scratch. You should find a reference design schematic (e.g., https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html) and use that as a starting point. When you see something in that schematic you don't understand, research it well before you change it. As markg@prosensing.com mentioned above, there are non-intuitive dependencies that must be accounted for--such as the relationship between configuration Bank 0 and Banks 14 and 15:

2019-09-20_10-43-57.jpg

 

 

You should be able to use 3.3V to power the VCCO of all 4 HR banks of your device, and use 1.8V to power the HP banks. Most likely, then, configuration Bank 0 will be powered by 3.3V as well.

Assuming you have multiple HR banks that are all powered by the same voltage rail, the switching thresholds should be the same for inputs in all of those banks. Specifically, for 3.3-V powered HR banks:

2019-09-20_10-35-39.jpg

2019-09-20_10-49-24.jpg

Note that FPGA's are sensitive devices. Signal integrity must be a consideration at all times. Over- and undershoot must be controlled:

2019-09-20_10-37-18.jpg

-Joe G.

 

 

Participant mubasheerahmed_12
Participant
506 Views
Registered: ‎08-22-2019

Re: XC7K160T KINTEX 7

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Hello Joe.

Thank you so much, the way you expressed your comment really boosted myself.

Joe, can I get vivado project reference files based this kintex 7 FPGA is free to download?

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Participant mubasheerahmed_12
Participant
494 Views
Registered: ‎08-22-2019

Re: XC7K160T KINTEX 7

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Hi Joe,
and one more thing.
to design based on XC7K160t FBG484 what version vivado should I download and is it available for free or should I have to purchase it?
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Registered: ‎01-22-2015

Re: XC7K160T KINTEX 7

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@mubasheerahmed_12 

For the XC7K160T you can use the free "Vivado HLx 2019.1 WebPACK", which you can download from the following site.  
https://www.xilinx.com/support/download.html

None of the three updates to "Vivado HLx 2019.1 WebPACK" are needed for the XC7K160T.

Before you install Vivado, read about computer requirements in Xilinx document, UG973.  Also, Table 1 in UG973 shows all the FPGAs supported by WebPACK Vivado.

Mark

 

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Participant mubasheerahmed_12
Participant
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Registered: ‎08-22-2019

Re: XC7K160T KINTEX 7

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Hi sir.

Thank you for your reply.

I will download that version of Xilinx.

And I have another question please don't mind.

I have downloaded a reference design but the schematic file something looks like this in the image,it's really starnge for me, so far I am using cadence 16 but don't know how to convert this files to view in capture schematic.

Can you help me out of this.

Thank you

IMG_20190921_220926.jpg
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Registered: ‎01-22-2015

Re: XC7K160T KINTEX 7

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@mubasheerahmed_12 

   …don't know how to convert this files to view in capture schematic.

I am unable to answer your new question.  I recommend that you start a new post with your new question.

In general, you will get better response to your questions if you write them in a new post – rather than attaching them to an old post.

Mark

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Scholar jg_bds
Scholar
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Registered: ‎02-01-2013

Re: XC7K160T KINTEX 7

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I didn't mean to imply that you need to start with precise CAD files from the reference design. That's often not the case for most designers. You might/probably need to re-generate the whole schematic in your own CAD system.

I only meant that when it comes to deciding what to connect--and to where and how to connect it--then refer to the reference design schematics for guidance.

-Joe G.

 

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