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Registered: ‎04-27-2018

ZCU102 QSPI GENFIFO POLL bit didn't work

Hi all,

I am porting the qspi driver in zcu102 which run on a RTOS(Non-Linux) to access MT25Q Flash.
I have refered to FSBL's qspi driver source(xqspipsu_polldata_polltimeout_interrupt_example.c)
Then flash erase,write and read work well now.
(i used while(1){} to check the program/erase completion status)

To removes the software overhead,now i am trying to use GQSPI Controller's POLL function(GENFIFO's POLL bit)
to poll completion status of flash program/erase,whcih is written in [ug1085 chapter 24 (page 648)] datasheet .

I have gone through the datasheet and these were the steps i have used.
1.config POLL CFG register to set expected value:
  enable both upper and lower bus mask,set mask with 0x7F,and set poll data with 0x80
     (i am trying to poll flash's flag register status,def as follows.
       and i use two flash chip working in 8 IO mode(Dual SS paralle))
     flag register status:bit7=1 erase/program operation done
                          bit7=0 erase/program operation in process
2.make a receive genfifo command with poll bit ON to polling flag status.
3.If RXFIFO NOT EMPTY interrupt comes, read RXFIFO
(i didn't set POLL TIMEOUT register so the controller will polling the flag status forever until it matched expected value)

Refer to the datasheet,it says:
"The poll bit of the generic FIFO is used to continuously read the status of SPI device until it
matches with the value in the POLL_DATA field of the poll register. The data read from the
SPI device is written into the RXFIFO."

It seems like there is no reason to read out any data before "matched".
if it can read,the flag status has alreadly matched with 0x80.

The problem is i can not always read out 0x80 from RXFIFO,
sometime it is 0x00(which means in erase/program processing).
And when flag status is 0x00,i confirm the data,program operation executed failed.
Overall my POLL configuration seems not work.

Can anyone please tell me what else should be done to use GENFIFO's poll function?


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Registered: ‎04-27-2018

Re: ZCU102 QSPI GENFIFO POLL bit didn't work

I have tried to set the POLL TIMEOUT config as follows,it still doesn't work.
  1.Enbale GQSPI_CFG register's EN_POLL_TIMEOUT
  2.Setup timeout value for GQSPI_P_TIMEOUT register
  3.Enable Poll_Time_Expire interrupt

I will apretiate any idea. Thanks.

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