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Registered: ‎08-25-2016

ZYNQ UART Timeout interrupt never trigger

Now I am doing a work that using the ZYNQ 7Z020 UART receive message,I want use the Timeout interrupt Let the processor know that the messge have received. But only the receive trigger interrupt has been trigger. The timeout interrupt does not.

 

I read the pdf of zynq 7000. from the pdf-->I know that have two way to trigger the receive timer.

 

1.when a receive start has been receive,the the timer will work.

2.write the register of CR-->TORST bit

 

when I send a message to zynq,the timer does not trigger,then I think when receive a char trigger the interrupt,then write the CR-->TORST bit -->1,But the timer has not work!!,what a **bleep** .some say that is the ZYNQ bug,the timer will not work.  But I need this timeout interrupt.

 

SO this is my code .hope someone who can help me !

 

if you can help me solve the this problem.welcome to china . I am in shenzhen .find me ,and I will Invitation to eat many good food.

Thank you very much!!------>This is my code. just for test!.  may be it looks like garbage.....

 

 

#include "uart.h"
#include "stdio.h"
#include "stdlib.h"
#include "stdarg.h"
#include "share_peripheral_interrupt.h"

XUartPs UART_InitStruct[2];
/*
 * UART_InitStruct[0] --> UART0
 * UART_InitStruct[1] --> UART1
 * If have more uart,define like this.
 * */

extern XUartPs_Config XUartPs_ConfigTable[2];

/* This parameters define by Cherish */
static uint16_t uart_rx_count = 0;
uint8_t uart_receive_date[500] = {0};
uint8_t MESSAGE_RECEIVED_COMPLETE;


int uart_init(enum UARTx uart, u32 baud)
{
    u32 Reg_temp;
    int Status;
    u32 IntrMask;
    int UART_INT_IRQ_ID;
    XUartPs_Handler Handle;
    XUartPs_Config *Config;

    switch(uart) {
    case uart0:
        UART_INT_IRQ_ID = XPS_UART0_INT_ID;
        Handle = USART0_IRQHandler;
        break;
    case uart1:
        UART_INT_IRQ_ID = XPS_UART1_INT_ID;
        Handle = USART1_IRQHandler;
        break;
    }

    Config = XUartPs_LookupConfig(uart);
    if (NULL == Config) {
        return XST_FAILURE;
    }
    /* 1.Reset Controller */
    XUartPs_ResetHw(Config->BaseAddress);
    /* need some time */
    /*while((Reg_temp & 0x00000003) != 0x00000003) {
        Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IER_OFFSET);
    }*/
    //Xil_Out32(0x00000228,0x0000000a);
    //Xil_Out32(0x00000228,0x00000000);

    /* 4.1configure UART clock and other functions */
    Status = XUartPs_CfgInitialize(&UART_InitStruct[uart], Config, Config->BaseAddress);
    if (Status != XST_SUCCESS) {
        return XST_FAILURE;
    }
    /* 4.2configure the baud */
    XUartPs_SetBaudRate(&UART_InitStruct[uart], baud);
    /* 4.3 set trigger level */
    XUartPs_SetFifoThreshold(&UART_InitStruct[uart],1);

    Status = UartSetupInterruptSystem(&Share_Interrupt_Struct, &UART_InitStruct[uart], UART_INT_IRQ_ID);
    if (Status != XST_SUCCESS) {
        return XST_FAILURE;
    }
    XUartPs_SetHandler(&UART_InitStruct[uart], Handle, &UART_InitStruct[uart]);

    /* 4.4 enable UART */
    XUartPs_EnableUart(&UART_InitStruct[uart]);
    /* 4.5 set timeout */
    XUartPs_SetRecvTimeout(&UART_InitStruct[uart],8);



    //Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IER_OFFSET);
    //Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IDR_OFFSET);
    //Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IER_OFFSET);
    //Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IDR_OFFSET);
    /* 5. configure interrupts */
    IntrMask = XUARTPS_IXR_RXOVR | XUARTPS_IXR_TOUT;

    /*IntrMask =
        XUARTPS_IXR_TOUT | XUARTPS_IXR_PARITY | XUARTPS_IXR_FRAMING |
        XUARTPS_IXR_OVER | XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXFULL |
        XUARTPS_IXR_RXOVR;
*/
    XUartPs_SetInterruptMask(&UART_InitStruct[uart], IntrMask);

    /* 5.3 clean the flag */
    XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_RXRST);
    XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_TORST);
    /* 6.configure modem control */
    XUartPs_SetOperMode(&UART_InitStruct[uart], XUARTPS_OPER_MODE_NORMAL); /*  */

    Reg_temp = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_IMR_OFFSET);
    return XST_SUCCESS;
}

int UartSetupInterruptSystem(XScuGic *IntcInstancePtr,
        XUartPs *UartInstancePtr,
        u16 UartIntrId)
{
    int Status;
    Status = XScuGic_Connect(IntcInstancePtr,UartIntrId,
            (Xil_InterruptHandler)XUartPs_InterruptHandler,
            (void *)UartInstancePtr);
    if (Status != XST_SUCCESS) {
        return XST_FAILURE;
    }
    XScuGic_Enable(IntcInstancePtr, UartIntrId);  /* jump to interrupt */
    Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
    return XST_SUCCESS;
}

void uart_send_char(enum UARTx uart, u8 Data)
{
    u32 BaseAddress;
    switch(uart){
    case uart0: {BaseAddress = XPAR_PS7_UART_0_BASEADDR;}; break;
    case uart1: {BaseAddress = XPAR_PS7_UART_1_BASEADDR;}; break;
    }
    XUartPs_SendByte(BaseAddress,Data);
}


void uart_print(enum UARTx uart,uint8_t *ptr)
{
      while (*ptr) {
          uart_send_char(uart,*ptr++);
      }
}
/*
int my_printf(enum UARTx uart, char *fmt, ...)
{
    char *p;
    va_list ap;

    va_start(ap,fmt);
    for(p = fmt; *p; p++) {
        if(*p == '%') {
            p ++;
            switch(*p) {
            case 'd':
                printf("%d",va_arg(ap,int));
                break;
            case 'c':
                printf("%c",va_arg(ap,int));
                break;
            case 's':
                printf("%s",(char *)va_arg(ap,int));
                break;
            case 'f':
                printf("%f",va_arg(ap,double));
                break;
            case '%':
                uart_send_char(uart,'%');
                break;
            }
            } else {
                uart_send_char(uart,*p);
        }
    }
    va_end(ap);
    return 0;
}*/

int my_printf(enum UARTx uart, char *fmt, ...)
{
    int i=0;
    va_list args;
    unsigned int n;
    char buffer[1024];

    va_start(args,fmt);
    n = vsprintf(buffer,fmt,args);
    va_end(args);
    for(i=0;i<n;i++) {
        uart_send_char(uart,buffer[i]);
    }
    return n;
}

u32 show_status(enum UARTx uart)
{
    u32 temp;
    temp = XUartPs_ReadReg(UART_InitStruct[uart].Config.BaseAddress,
               XUARTPS_ISR_OFFSET);
    return temp;
}



void uart_send_string(enum UARTx uart, u8 *Pst, u16 length)
{
    XUartPs_Send(&UART_InitStruct[uart],Pst,length);
}

void uart_receive_string(enum UARTx uart, u8 *Pst, u16 length)
{
    XUartPs_Recv(&UART_InitStruct[uart],Pst,length);
}

u8 uart_receive_char(enum UARTx uart)
{
    u32 BaseAddress;
    switch(uart){
    case uart0: {BaseAddress = XPAR_PS7_UART_0_BASEADDR;}; break;
    case uart1: {BaseAddress = XPAR_PS7_UART_1_BASEADDR;}; break;
    }
    return XUartPs_RecvByte(BaseAddress);
}

void USART0_IRQHandler(void *CallBackRef, u32 Event, unsigned int EventData)
{
    uart_print(uart1,"Hello World\n\r");
}


void USART1_IRQHandler(void *CallBackRef, u32 Event, unsigned int EventData)
{
    u32 Clean;
    /*
     * All of the data has been sent
     */
    if (Event == XUARTPS_EVENT_SENT_DATA) {
        //uart_print(uart1,"XUARTPS_EVENT_SENT_DATA\n");
        //XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK);
        XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_RXWM_OFFSET,XUARTPS_RXWM_RESET_VAL);
    }

    /*
     * All of the data has been received
     */
    if (Event == XUARTPS_EVENT_RECV_DATA) {
        /* This is the uart received char */
        //uart_print(uart1,"XUARTPS_EVENT_RECV_DATA\n");
        uart_receive_date[uart_rx_count++] = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_FIFO_OFFSET);
        XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_RXRST);
        XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_TORST);

    }

    /*
     * Data was received, but not the expected number of bytes, a
     * timeout just indicates the data stopped for 8 character times
     */
    if (Event == XUARTPS_EVENT_RECV_TOUT) {
        uart_print(uart1,"XUARTPS_EVENT_RECV_TOUT\n");
        XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_TORST);

        //XUartPs_WriteReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_CR_OFFSET,XUARTPS_CR_RXRST);
        //Clean = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_FIFO_OFFSET);
        //Clean = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR,XUARTPS_FIFO_OFFSET);
        uart_rx_count = 0;
        //MESSAGE_RECEIVED_COMPLETE = 1;
    }

    /*
     * Data was received with an error, keep the data but determine
     * what kind of errors occurred
     */
    if (Event == XUARTPS_EVENT_RECV_ERROR) {
        uart_print(uart1,"XUARTPS_EVENT_RECV_ERROR\n");
    }
}

 

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