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Explorer
Explorer
312 Views
Registered: ‎04-12-2012

Zynq 7 Purpose of AXI FIFO Interfaces

Hello,

As far as I understand the Zynq 7 Processing System supports up to 4 HP (High Performance) AXI MM slave interfaces.

But with every enabled HP interface I see that a corresponding FIFO CTRL interface also shows up in the block design's GUI.

What's the purpose of the FIFO CTRL interface ? 

zynq_fifo.JPG
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4 Replies
Xilinx Employee
Xilinx Employee
249 Views
Registered: ‎07-11-2019

Re: Zynq 7 Purpose of AXI FIFO Interfaces

Hello @shaikon 

I have attached a link to a forum question that will help answer your question. I also attached a link to the Zynq-7000 SoC Technical Reference Manual they reference in the forum. 

Forum: https://forums.xilinx.com/t5/Processor-System-Design/What-is-S-AXI-HP0-FIFO-CTRL-interface/td-p/380317

UG585 TRM: https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

I hope this helps!

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Explorer
Explorer
231 Views
Registered: ‎04-12-2012

Re: Zynq 7 Purpose of AXI FIFO Interfaces

Hello,

I came across this thread before posting.

Unfortunately it didn't fully explain the necessity of the FIFO ports.

For example:

"The logic signals, SAXIHP{0-3}RDISSUECAP1_EN and SAXIHP{0-3}WRISSUECAP1_EN allow you to
change the issuing capability of the AFI block to the PS dynamically between two levels."

When should these FIFOs be written to or read from ?

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Xilinx Employee
Xilinx Employee
177 Views
Registered: ‎07-11-2019

Re: Zynq 7 Purpose of AXI FIFO Interfaces

@shaikon 

Of course. I will work on finding you a sufficient answer to your question, so thank you for your patience. 

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Xilinx Employee
Xilinx Employee
78 Views
Registered: ‎07-11-2019

Re: Zynq 7 Purpose of AXI FIFO Interfaces

@shaikon 

From the TRM, these ports are described as follows...

"High Performance ports (AXI_HP) with
read/write FIFOs and two dedicated
memory ports on DDR controller and
a path to the OCM. "

A colleague has also explained that these parts allows for additional control/visibility of the FIFOs going into the PS. He also mentions that this is only ever used when advanced flow control is needed. 

I hope this helps clarify the need for the ports! 

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