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Registered: ‎12-08-2019

Zynq UltraScale+ MPSoc PS DDR pin connections with 2pcs DDR4

Designing XCZU2CG-1SBVA484I with 2pcs DDR4 16bit components using PS DDR controller.

How should I connect signals (CKE1, CS_N1, ODT1, CK1, CK_N1) of PS DDR? Are they connect to DRAM #2(CKE, CS ODT, CK)?

How should I connect signals (LDQS, UDQS, UDM, LDM) of DRAM #2?

According to UG1075 Table 2-2, I had connected PS DDR with 2pcs DDR4. Could you help to check the PIN connections below?

Thanks.

 

XCZU2CG-1SBVA484I

DRAM #1

DRAM #2

PS_DDR_A0

A0

A0

PS_DDR_A1

A1

A1

PS_DDR_A2

A2

A2

PS_DDR_A3

A3

A3

PS_DDR_A4

A4

A4

PS_DDR_A5

A5

A5

PS_DDR_A6

A6

A6

PS_DDR_A7

A7

A7

PS_DDR_A8

A8

A8

PS_DDR_A9

A9

A9

PS_DDR_A10

A10/AP

A10/AP

PS_DDR_A11

A11

A11

PS_DDR_A12

A12/BC_N

A12/BC_N

PS_DDR_A13

A13

A13

PS_DDR_A14

WE_N/A14

WE_N/A14

PS_DDR_A15

CAS-N/A15

CAS-N/A15

PS_DDR_A16

RAS_N/A16

RAS_N/A16

PS_DDR_A17

 

 

PS_DDR_BA0

BA0

BA0

PS_DDR_BA1

BA1

BA1

PS_DDR_BG0

BG0

BG0

PS_DDR_BG1

 

 

PS_DDR_ACT_N

ACT_N

ACT_N

PS_DDR_PARITY

PAR

PAR

PS_DDR_CKE0

CKE

 

PS_DDR_CKE1

 

CKE

PS_DDR_CS_N0

CS_N

 

PS_DDR_CS_N1

 

CS_N

PS_DDR_ODT0

ODT

 

PS_DDR_ODT1

 

ODT

PS_DDR_RAM_RST_N

RESET_N

RESET_N

PS_DDR_ALERT_N

ALERT_N

ALERT_N

PS_DDR_ZQ

ZQ

ZQ

PS_DDR_CK0

CK_T

 

PS_DDR_CK_N0

CK_C

 

PS_DDR_CK1

 

CK_T

PS_DDR_CK_N1

 

CK_C

PS_DDR_DQS_P0

LDQS_T

LDQS_T

PS_DDR_DQS_N0

LDQS_C

LDQS_C

PS_DDR_DQS_P1

UDQS_T

UDQS_T

PS_DDR_DQS_N1

UDQS_C

UDQS_C

PS_DDR_DQS_P2

 

 

PS_DDR_DQS_N2

 

 

PS_DDR_DQS_P3

 

 

PS_DDR_DQS_N3

 

 

PS_DDR_DQS_P8

 

 

PS_DDR_DQS_N8

 

 

PS_DDR_DM0

LDM_N

LDM_N

PS_DDR_DM1

UDM_N

UDM_N

PS_DDR_DM2

 

 

PS_DDR_DM3

 

 

PS_DDR_DM8

 

 

PS_DDR_DQ0

DQ0

 

PS_DDR_DQ1

DQ1

 

PS_DDR_DQ2

DQ2

 

PS_DDR_DQ3

DQ3

 

PS_DDR_DQ4

DQ4

 

PS_DDR_DQ5

DQ5

 

PS_DDR_DQ6

DQ6

 

PS_DDR_DQ7

DQ7

 

PS_DDR_DQ8

DQ8

 

PS_DDR_DQ9

DQ9

 

PS_DDR_DQ10

DQ10

 

PS_DDR_DQ11

DQ11

 

PS_DDR_DQ12

DQ12

 

PS_DDR_DQ13

DQ13

 

PS_DDR_DQ14

DQ14

 

PS_DDR_DQ15

DQ15

 

PS_DDR_DQ16

 

DQ0

PS_DDR_DQ17

 

DQ1

PS_DDR_DQ18

 

DQ2

PS_DDR_DQ19

 

DQ3

PS_DDR_DQ20

 

DQ4

PS_DDR_DQ21

 

DQ5

PS_DDR_DQ22

 

DQ6

PS_DDR_DQ23

 

DQ7

PS_DDR_DQ24

 

DQ8

PS_DDR_DQ25

 

DQ9

PS_DDR_DQ26

 

DQ10

PS_DDR_DQ27

 

DQ11

PS_DDR_DQ28

 

DQ12

PS_DDR_DQ29

 

DQ13

PS_DDR_DQ30

 

DQ14

PS_DDR_DQ31

 

DQ15

PS_DDR_DQ64

 

 

PS_DDR_DQ65

 

 

PS_DDR_DQ66

 

 

PS_DDR_DQ67

 

 

PS_DDR_DQ68

 

 

PS_DDR_DQ69

 

 

PS_DDR_DQ70

 

 

PS_DDR_DQ71

 

 

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