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Contributor
Contributor
2,958 Views
Registered: ‎04-10-2018

ZynqMP PS-GTR SGMII Fixed Link

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I am trying to use a PS-GTR lane on a custom ZynqMP board to talk to an SFP cage over SGMII. I have read AR 66592 and followed all of the guidelines contained in it.

 

Linux correctly configures the device as a fixed link GE duplex connection, and traffic can be sent, but nothing is ever received. My PHY (FCLF8520P2BTL) is successfully recognized by the switch as a 1000-BASE-T device, and the PHY pulls LOS to ground to show that the link is good. If I put a loopback SFP into the cage however, the loopback traffic is noted as being received by ifconfig.

 

Because I am talking to an SFP cage over SGMII, I do not have an MDIO bus. I have therefore set up a fixed link connection and applied the patch posted by @nanz in this thread to my kernel sources. My configuration is very similar to that poster, and the symptoms are the same

 

My device tree therefore looks like this:

&gem0

{

    status = "okay";

    phys = <&lane0 6 0 2 125000000>;

    phy-mode = "moca";

    is-internal-pcspma;

    fixed-link {

        speed = <1000>;

        full-duplex;

    };

};

 

Note that the "phys =" line appears to have no effect as this does not appear to be implemented in the driver yet, however my serdes module does not contain xlnx,tx_termination_fix, which should prevent the lane being reconfigured (AR68866).

 

 

Inspecting the gigabit TX line with my oscilloscope shows that data is being sent from the Zynq at approximately the correct clock frequency, however it is hard to make further deductions than this since this is nearing the bandwidth limit of my oscilloscope.

 

Inspecting the output of the Copper transciever with wireshark shows that no traffic makes it to the outside world when the Zynq is transmitting data.

 

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Contributor
Contributor
2,989 Views
Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @nanz,

 

Whilst checking the register values, I discovered the solution to my problem!

 

The solution was to manually clear bit 12 (enable_auto_neg) in the pcs_control register. This disables auto negotiation which allows the PS to talk to my SFP properly.

 

Thank you for your help! For completeness, here are the answers to your questions anyway:

 

I am targeting an xczu7eg-ffvf1517-1-e, using Vivado 2018.1, with AR71147 and AR1052 patches applied.

 

Register values:

0xFD401994 : 0x00000007

0xFD405994 : 0x00000007

0xFD409994 : 0x00000007

0xFD40D994 : 0x00000007

 

PCS Loopback receives traffic.

Both directions didn't work.

View solution in original post

13 Replies
2,919 Views
Registered: ‎01-08-2012

Re: ZynqMP PS-GTR SGMII Fixed Link

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> Because I am talking to an SFP cage over SGMII, I do not have an MDIO bus. 

 

But you should have an I2C connection to the SFP cage.  This will allow you to interrogate the registers of the SFP's PHY.  The answer you seek is possibly sitting in one of those status registers.

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Contributor
Contributor
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Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

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I've had a good look at the registers over I2C, and from what I can see everything is configured correctly. The PHY reports that the Zynq does not autonegotiate the link speed with it, but in the case of my PHY this means that it assumes a full duplex gigabit link.

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2,897 Views
Registered: ‎01-08-2012

Re: ZynqMP PS-GTR SGMII Fixed Link

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We allow the use of that particular SFP in our products, and I'm reasonably sure that it doesn't work (with symptoms of "link up but no traffic") unless its AN registers are programmed to something other than the default.  I just can't remember what that is exactly.

 

There's a fairly limited number of combinations though - perhaps you could exhaustively search for the magic setting?

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Moderator
Moderator
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Registered: ‎09-12-2007

Re: ZynqMP PS-GTR SGMII Fixed Link

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Contributor
Contributor
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Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

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I've tried more than one SFP (of the same model), and both don't work. I also know the SFPs are good, as I can get them to work through the PL.

 

I have also tried using a media converter (albeit one which uses the same Marvell PHY chip) with no success.

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Moderator
Moderator
2,795 Views
Registered: ‎08-25-2009

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @josh_tyler,

 

The fixed link patch is needed for every version;

https://www.xilinx.com/support/answers/69769.html

I suppose you have taken care of this already. Your DTS file looks fine and MDIO is optional.

 

But why do you need to use "fixed link"? Fixed link is supposed to be used between MAC to MAC direct connection without a PHY. You have a SGMII SFP module in your setup.

Have you tired without "fixed link" to see?

 

Thanks,

Nan

"Don't forget to reply, kudo and accept as solution."
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Contributor
Contributor
2,766 Views
Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @nanz,

 

Yes I have tried it without having a fixed link in my device tree using the device tree suggested in AR66592:

 
&gem2 {
        phy-handle = <&phy0>;
        phy-mode = "sgmii";
        phy0: phy@0{
                reg = <0>;
                ti,rx-internal-delay = <0x8>;
                ti,tx-internal-delay = <0xa>;
                ti,fifo-depth = <0x1>;
        };
};
 

However with that configuration the link always shows as down. I'm using a fixed link because I am using an SFP, and so therefore am unable to connect the MDIO bus to the processor. Without this it seems that the PS is unable to negotiate properly with the PHY, and so the link always shows as down.

 

It was my understanding that, given the outside network is guaranteed to be a full-duplex gigabit network in my case, I could use a fixed link to force the PS into a good configuration.

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Moderator
Moderator
2,762 Views
Registered: ‎08-25-2009

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @josh_tyler,

 

Could you please upload your entire DTS file and your bootlog to have a look?

"Don't forget to reply, kudo and accept as solution."
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Contributor
Contributor
2,710 Views
Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @nanz,

 

Uploading the entire device tree and bootlog is slightly inconvenient for us to do, however attached is the relevant excerpts from both the bootlog and device tree (everything to do with the peripheral and driver is included).

 

If you feel that there is anything to be gained from seeing a more complete DTS and bootlog, let me know and I'll see what can be arranged.

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Moderator
Moderator
2,334 Views
Registered: ‎08-25-2009

Re: ZynqMP PS-GTR SGMII Fixed Link

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Hi @josh_tyler,

 

Can I ask which version of the tool and which exact device you are targeting?

Could you please first check the following register settings?

GT internal registers:

  • 0xFD401994
  • 0xFD405994
  • 0xFD409994
  • 0xFD40D994    

Can you please also try to enable PCS loopback to see if you could get a linkup up and traffic?

Please also grab PCS status register value?

Do both directions not work or only with TX?

"Don't forget to reply, kudo and accept as solution."
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Contributor
Contributor
2,990 Views
Registered: ‎04-10-2018

Re: ZynqMP PS-GTR SGMII Fixed Link

Jump to solution

Hi @nanz,

 

Whilst checking the register values, I discovered the solution to my problem!

 

The solution was to manually clear bit 12 (enable_auto_neg) in the pcs_control register. This disables auto negotiation which allows the PS to talk to my SFP properly.

 

Thank you for your help! For completeness, here are the answers to your questions anyway:

 

I am targeting an xczu7eg-ffvf1517-1-e, using Vivado 2018.1, with AR71147 and AR1052 patches applied.

 

Register values:

0xFD401994 : 0x00000007

0xFD405994 : 0x00000007

0xFD409994 : 0x00000007

0xFD40D994 : 0x00000007

 

PCS Loopback receives traffic.

Both directions didn't work.

View solution in original post

Moderator
Moderator
2,315 Views
Registered: ‎08-25-2009

Re: ZynqMP PS-GTR SGMII Fixed Link

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HI @josh_tyler,

 

Great news! Thanks for posting your solutions. :-)

AN has to be enabled/disabled on both sides of the link. As when you do loopback it works, it's because it's AN to itself. Fixed link does not automatically disable this.

"Don't forget to reply, kudo and accept as solution."
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Visitor grass_be
Visitor
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Registered: ‎07-14-2015

Re: ZynqMP PS-GTR SGMII Fixed Link

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After clearing the "enable_auto_neg" bit in the PCS control register, I had to write to bit 15 "pcs_software_reset" in order to have this change applied.

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