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Adventurer
Adventurer
5,576 Views
Registered: ‎08-21-2016

inout port

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do we need to do any settings in vivado tool when we are using inout port in our custom ip core?

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Xilinx Employee
Xilinx Employee
10,015 Views
Registered: ‎07-31-2012

Re: inout port

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In addition ensure that the tristate of the bi-directional buffer is correctly controlled for read and write.
Thanks,
Anirudh

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Teacher muzaffer
Teacher
5,561 Views
Registered: ‎03-31-2012

Re: inout port

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inout ports are only meaningful when they are connected to external/chip IO pins so you may want to add an XDC constraint for this assignment. If you want to allow the user of the IP to select the pin (which is desirable) I am not sure how you enforce that (ie the user not connecting an internal net to your inout port).

 

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Xilinx Employee
Xilinx Employee
5,547 Views
Registered: ‎08-01-2008

Re: inout port

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check this ARs
http://www.xilinx.com/support/answers/65277.html

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_3/ug1119-vivado-creating-packaging-ip-tutorial.pdf


For Inout port (for example in RAM):

....
port(
data :inout std_logic_vector (DATA_WIDTH-1 downto 0);
....
-- Memory Write Block
-- Write Operation : When we = 1, cs = 1
MEM_WRITE: process (address, cs, we, data, address_1, cs_1, we_1, data_1) begin
if (cs = '1' and we = '1') then
mem(conv_integer(address)) <= data;
end if;
end process;

-- Tri-State Buffer control
data <= data_out when (cs = '1' and oe = '1' and we = '0') else (others=>'Z');

-- Memory Read Block
MEM_READ: process (address, cs, we, oe, mem) begin
if (cs = '1' and we = '0' and oe = '1') then
data_out <= mem(conv_integer(address));
else
data_out <= (others=>'0');
end if;
end process;
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
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Adventurer
Adventurer
5,529 Views
Registered: ‎08-21-2016

Re: inout port

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thanks for the reply ... actually I am doing the A2D Register read & and write ,with the single port..so I have assigned that port as inout...with that I wrote the some logic for read & write .i am able to write into the a2d but not able to read from the a2d register..

as per my knowledge my read logic is correct  but still not getting the output..so i am doubting is there any changes should i do in the vivado tool for inout port..   please help 

 

 

with reagrds

RAMESH

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Xilinx Employee
Xilinx Employee
5,524 Views
Registered: ‎07-31-2012

Re: inout port

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Do you have bidirectional buffer inferred/instantiated? Because the bi-directional buffer is the one needed to take care of bidirectional signals - Check Pg 30 for more information http://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf


Thanks,
Anirudh

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Xilinx Employee
Xilinx Employee
10,016 Views
Registered: ‎07-31-2012

Re: inout port

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In addition ensure that the tristate of the bi-directional buffer is correctly controlled for read and write.
Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.

View solution in original post

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Teacher muzaffer
Teacher
5,520 Views
Registered: ‎03-31-2012

Re: inout port

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what is the interface of the a2d register access ? Is it i2c, or some other standard?

One way to make sure it would work is to simulate the design. Did you simulate it? Do you have a model for the a2d register behavior?

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Xilinx Employee
Xilinx Employee
5,495 Views
Registered: ‎07-31-2012

Re: inout port

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Just wanted to check if this answers your question.
Thanks,
Anirudh

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Adventurer
Adventurer
5,433 Views
Registered: ‎08-21-2016

Re: inout port

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i am using the 3 wire interfacing. Same as i2c but one extra control.. line ..more information find the a2d datasheet here
http://www.analog.com/media/en/technical-documentation/data-sheets/AD9826.pdf.. ya.. I had tested my design through simulation .. I am getting the proper waveform what I expecting. But still not able to do the read from a2d.. please help
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Teacher muzaffer
Teacher
5,398 Views
Registered: ‎03-31-2012

Re: inout port

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make sure you are complying with timing of the target device. how fast is your clock, setup/hold of the data signals met?
Do you have a scope? Probe the clock & data signals (and sload ie select) and make sure everything looks good at the device.
Another thing to check is to see if you are able to get anything from the device and see if you can correlate to what you need to get to see what error you are making.
Finally make sure your device is not in reset and check if you need to set/clear any bits in the register space before you can do other transactions.
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