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Adventurer
Adventurer
2,352 Views
Registered: ‎10-24-2011

may be an error in <<DS844 axi master burst>>in timing diagram of burst write transaction?

I am reading the DS844 these day,because I want to figure out how to use the burst write function of axi4,but I found maybe an error on the datasheet on the page of 22,Figure 10: Example Burst Write Transaction Timing ,signal "m_axi_wvalid " and signal"m_axi_wready" in specific.I refer to AMBA AXI docs<<AMBA ®AXI™ and ACE™ Protocol Specification>>,pageA3-39,Figure A3-2 VALID before READY handshake,there's obvious error compared to ARM's doc,so I wonder if there's an error on DS844 or I am wrong?

DS844-fig10.png
AMBA AXI and ACE protocol specification.png
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Adventurer
Adventurer
2,335 Views
Registered: ‎10-24-2011

Re: may be an error in <<DS844 axi master burst>>in timing diagram of burst write transaction?

Is anyone know the answer?thank you in advance
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