why does cpu1 of zynq XC7Z020 seem to be damaged

[saiwing_hit]

hello, everyone

I am using zynq XC7Z020 SOC, during past half year, it run quite well.

However, days ago, I suddenly found CPU1 fails.

After power up,  register A9_CPU_RST_CTRL(0xF8000244)  has value 0x22( which means CPU1 clock stopped and CPU1 held in reset state).  CPU0 is OK.

I tried to clear A9_CPU_RST_CTRL, CPU1 still doesn't work. I also check pin PS_SRST_B and PS_POR_B, the timing sequence satisfy UG585 doc.

I am very sure both CPUs were ok before, but now I can only have CPU0 work.

What is the cause and how can I solve the problem

I will be very grateful for your advice.

[saiwing_hit]

Anyone could give me some advices?

I made 20 product modal, 4 of 20 suffered Zynq CPU1 disapperance. This is really bad!

[jdreil]

Have you tried taking cpu1 out of reset by writing to A9_CPU_RST_CTRL register as described in ug585 (v1.12.2), section 3.7.1?

[fernandovives]

Hi

I don't know what is the solution of your problem. Can you share information about the workload, temperature, electric parameters that you exposed the ZYNQ FPGA? I'M using the same FPGA in my design, any information will be helpful.

Thanks, I hope that you can solve this problem.

[lowearthorbit]

Damage from ESD sounds like it might be the cause,

Is your product protected against normal handling ESD?

If it is a bare board, the answer is no.  If it is a board in a metal enclosure, the answer is maybe.  LED, switches, connectors are alkl paths for damage.  Are they protected?

l.e.o.

[saiwing_hit]

I was suspecting the failure was caused during power on&off, but now i tends to believe cpu1 fails during the software running.

the soc runs linux system. vdma obtains image from sensor and store it into DDR, application read the image from DDR and process the image, output data through tcp port.

temperature is room temperature. I don't know exactly about electric parameters, We supply it 3.3V DC to FGPA

this failure is very hard to repeat.  

[saiwing_hit]

thanks for your reply,

the board locates inside a alluminum box. We didn't do ESD test. I think the borard designer didn't consider much about esd protection, how can we confirm esd problem?

[lowearthorbit]

A good test for ESD susceptibility,

Is to look at radiated EMI/RFI.  If the enclosure is letting RF out of the box, then it is not ESD proof:  in other words, if RF gets out, ESD can get in.

To test ESD, you need a high voltage (4,000v or 8,000v), and a disharge model probe (human body, and machine model).  Then you zap all surfaces, all switches, leds, connectors.  If it is damaged, you fail ESD protection.  If you never did this, I would hire a ESD specialist to come in and educate you on how to pass such tests.

l.e.o.

[jdreil]

Have you tried attaching a debugger to the Zynq JTAG?  Normally cpu0 and cpu1 will both appear on the JTAG chain.  What do you see?

[saiwing_hit]

I ever tried, but only cpu0 showed.