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Visitor
Visitor
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Registered: ‎04-04-2019

FPGA PCIe accelerator for a DEFLATE compression algorithm deployed on Windows application

I'm a total noobie here.  I'd like to make an FPGA PCIe accelerator for a DEFLATE algorithm running on a Windows 10 x64 application.  There are some nice looking code for doing such:

  • The Xilinx SDAccel example
  • and "High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms"

These all use OpenCL/SDAccel. 

My question is, while I know that Windows is not supported as an environment for SDAccel, is there a workaround?  Perhaps it is possible to export compiled SDAccel code into an FPGA IP core that can be re-imported into a tool (Vivado?) that can deploy to a Windows system?

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-24-2010

回复: FPGA PCIe accelerator for a DEFLATE compression algorithm deployed on Windows application

Windows currently is not supported for SDAccel. 

For DEFLATE realization, you may refer to https://github.com/xilinx/applications

For the kernel itself (HLS realization), you may integrate it into your existing platforms, but not into SDAccel +Windows.

Regards,
brucey
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