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Visitor snorwin
Visitor
255 Views
Registered: ‎10-11-2018

Configuration readback through PCIe

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I'm working on an FPGA project that includes a KCU1500 and is using the SDAccel environment. I was wondering how do I read back the configuration on the FPGA through PCI express? Is it possible to download the entire bitstream from the FPGA back to the host? Or does an interface exist that could be used to extract the BRAM or the CLB using PCIe and which is accessible through the `xclmgmt` device driver? Because the exposed interfaces XVC, MCAP, ICAP on the AXI Bridge for PCIe aren't seem to support a read back as far as I know.

 

 

Has anyone had tried something similar? Any thoughts?

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Xilinx Employee
Xilinx Employee
207 Views
Registered: ‎03-24-2010

Re: Configuration readback through PCIe

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Not possible to read back bitstream.

It's possible to read board status and some other info. Check xbsak usage in chapter 7 of UG1279.

Regards,
brucey
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Xilinx Employee
Xilinx Employee
208 Views
Registered: ‎03-24-2010

Re: Configuration readback through PCIe

Jump to solution

Not possible to read back bitstream.

It's possible to read board status and some other info. Check xbsak usage in chapter 7 of UG1279.

Regards,
brucey
----------------------------------------------------------------------------------------------
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Give Kudos to a post which you think is helpful and reply oriented.
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