UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
463 Views
Registered: ‎05-23-2017

ERROR: [Constraints 18-1000] using the HLS

INFO: [Route 35-77] Router completed with failures. Please check the log file for Critical Warnings and run report_route_status for a summary of routing status.
ERROR: [Constraints 18-1000] Routing results verification failed due to partially-conflicted nets (Up to first 10 of violated nets):  pfm_top_i/dynamic_region/interconnect_aximm_host/inst/s00_entry_pipeline/s00_si_converter/inst/converter.wrap_narrow_inst/gen_thread_loop[0].r_unshelve_reg_n_0_[0] pfm_top_i/dynamic_region/memory_subsystem/inst/memory/ddr4_mem01/inst/u_ddr4_mem_intfc/u_ddr_mc/u_ddr_mc_ecc/u_ddr_mc_ecc_ri_xor/dReg_reg[4][46] pfm_top_i/dynamic_region/pcaf_fpga_1/inst/grp_linear_knn_compute_fu_2064/dist_calc_or1_U0/pcaf_fpga_mul_32s_32s_56_2_1_U2123/pcaf_fpga_pcaf_fpga_mul_32s_32s_56_2_1_MulnS_0_U/tmp_product/P[7] pfm_top_i/dynamic_region/interconnect_aximm_host/inst/s00_entry_pipeline/s00_mmu/inst/r_sreg/skid_buffer_reg_n_0_[1281] pfm_top_i/dynamic_region/interconnect_aximm_host/inst/s00_entry_pipeline/s00_si_converter/inst/converter.wrap_narrow_inst/gen_thread_loop[0].r_payld_fifo/gen_thread_loop[0].r_shelf_reg[0][579][510] pfm_top_i/dynamic_region/interconnect_aximm_host/inst/s00_entry_pipeline/s00_si_converter/inst/converter.wrap_narrow_inst/gen_thread_loop[1].r_payld_fifo/cmd_fifo/m_valid_i pfm_top_i/dynamic_region/interconnect_aximm_host/inst/s00_entry_pipeline/s00_si_converter/inst/converter.wrap_narrow_inst/gen_thread_loop[1].r_payld_fifo/r_payld_reg_reg[64] pfm_top_i/dynamic_region/memory_subsystem/inst/memory/ddr4_mem01/inst/u_ddr4_mem_intfc/u_ddr_cal_top/c0_ddr4_rd_data_phy2mc[44] pfm_top_i/dynamic_region/memory_subsystem/inst/memory/ddr4_mem01/inst/u_ddr4_mem_intfc/u_ddr_cal_top/c0_ddr4_rd_data_phy2mc[47] pfm_top_i/dynamic_region/memory_subsystem/inst/memory/ddr4_mem01/inst/u_ddr4_mem_intfc/u_ddr_cal_top/c0_ddr4_rd_data_phy2mc[437]

Time (s): cpu = 19:37:55 ; elapsed = 07:30:09 . Memory (MB): peak = 23200.176 ; gain = 1051.887 ; free physical = 32492 ; free virtual = 45756

Routing Is Done.
INFO: [Common 17-83] Releasing license: Implementation
465 Infos, 361 Warnings, 43 Critical Warnings and 1 Errors encountered.
route_design completed successfully
route_design: Time (s): cpu = 19:43:11 ; elapsed = 07:49:58 . Memory (MB): peak = 23200.176 ; gain = 1051.887 ; free physical = 32477 ; free virtual = 45741
INFO: [Timing 38-480] Writing timing data to binary archive.
Writing placer database...
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Write XDEF Complete: Time (s): cpu = 00:03:37 ; elapsed = 00:01:12 . Memory (MB): peak = 23200.176 ; gain = 0.000 ; free physical = 28602 ; free virtual = 45071
INFO: [Common 17-1381] The checkpoint '/home/xiaojia.song/SDAccel_Examples_2018_2/getting_started/host/PCAF_FPGA_sub_v2s2sub45_BFS_32_05/_x/link/vivado/prj/prj.runs/impl_1/pfm_top_wrapper_routed_error.dcp' has been generated.
write_checkpoint: Time (s): cpu = 00:08:19 ; elapsed = 00:07:07 . Memory (MB): peak = 23200.176 ; gain = 0.000 ; free physical = 31508 ; free virtual = 45498
ERROR: [Common 17-39] 'route_design' failed due to earlier errors.

INFO: [Common 17-206] Exiting Vivado at Fri Jan 18 11:48:22 2019...

I got this error when run the routing for my C++ code. 

There isn't enougth information to let me know which fucntion in my C++ code cause this issue.

Do I need to change the vivado optimization strategy and how in the xocc compiler?

 

Thanks.

0 Kudos
1 Reply
Moderator
Moderator
406 Views
Registered: ‎11-04-2010

Re: ERROR: [Constraints 18-1000] using the HLS

Hi, @mathmaxsean ,

You can check whether the routed dcp is generated. 

If the the routed dcp exists, you can try to open_checkpoint of this routed dcp in Vivado GUI to get the further information.

-------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos