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Contributor
Contributor
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Registered: ‎04-17-2012

Error when using LAPC: connect_bd_net requires at least two pins/ports, or one pin/port and a net

 

Hi,

In SDx2018.2, adding Lightweight AXI Protocol Checkers (LAPC):

Krnl_GA_LDCLFLAGS+=--dk protocol:Krnl_GA_1:all

I am getting the following error when building:

...
INFO: [VPL 60-251] Hardware accelerator integration... Creating Vivado project and starting FPGA synthesis. WARNING: [VPL 60-1142] Unabled to read data from
'<PROJECT_PATH>/_x/link/vivado/output/generated_reports.log',
generated reports will not be copied. ===>The following messages were generated while creating FPGA bitstream.
Log file:<PROJECT_PATH>/_x/link/vivado/vivado.log : ERROR: [VPL 41-701] connect_bd_net requires at least two pins/ports, or one pin/port and a net ERROR: [VPL 5-4] Error: running connect_bd_net.
ERROR: [VPL 60-773] In '<PROJECT_PATH>/_x/link/vivado/vivado.log', caught Tcl error:
ERROR: [Common 17-39] 'connect_bd_net' failed due to earlier errors.

I used the same LAPC flags in SDx v2017.4 without problems.

I need LAPC to analyze  kernel interfaces, but as shown above FPGA build fails.

Any help on this? 

Leo


Best,
L30nardo SV
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Moderator
Moderator
375 Views
Registered: ‎11-04-2010

Re: Error when using LAPC: connect_bd_net requires at least two pins/ports, or one pin/port and a net

Hi, @leonardo.solis ,

Which platform are you using?

Could you upload the vivado.log?

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