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1,057 Views
Registered: ‎04-03-2018

Fpga slower than cpu

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Hi

I am working on matrix mult example with size of 128*128 for the example provided in the following link (sdaccel 2017.4 kcu1500 board HW emulation)

https://github.com/Xilinx/SDAccel_Examples/tree/master/getting_started/cpu_to_fpga/04_partition_ocl

the FPGA time is as follows:

Wall Clock Time (Kernel execution): 70382742223 nanosec

However, executing similar algorithm on the cpu takes about 9823367 nanosec ( about 7164.82 time faster. )

Is this result reliable? Why fpga is too much slower?

Bests.

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Xilinx Employee
Xilinx Employee
1,331 Views
Registered: ‎09-08-2011

Re: Fpga slower than cpu

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1- what is the difference between Emulation time and Wall Clock Time?

 

In this context, i believe the Emulation time reflects how long it was estimated to run in. The Wall clock time is how long it took. The Emulation should be expected to run slower when measured how much real time it took from when the emulation kicked off to when the emulation finished when looking at not the time covered int he emulation but the time it took to run the emulation.

 

2. Is it any way to estimate the performance of kernel in the HW emulation (close to the real board)?

bests.

 

For the HW emulation we provide a fair bit of details in the profiling: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1023-sdaccel-user-guide.pdf which we cover the basics of in Chapter 3.

 

 

If at first you don't succeed, try redefining success?
3 Replies
Xilinx Employee
Xilinx Employee
1,005 Views
Registered: ‎07-18-2014

Re: Fpga slower than cpu

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Hi @yyyyaaaayyyy4,

 

Wall-clock time measured during emulation flow will not give you actual performance of kernel. As these are emulation flow which are good for kernel functionality check and debugging. If you will run them into real board, you will see the improvement.

For example, we are getting following result for this example, when ran on board:

 

On real board:

Wall Clock Time (Kernel execution): 246151
Note: Wall Clock Time is meaningful for real hardware execution only,not for emulation.

You can also see the Note message which also states the same. 

 

HW emulation do RTL level emulation, which really going to take lot of time to emulation. I hope this will help.

 

-Heera

996 Views
Registered: ‎04-03-2018

Re: Fpga slower than cpu

Jump to solution

Hi

so many thanks for your quick reply.

1- what is the difference between Emulation time and Wall Clock Time?

2- Is it any way to estimate the performance of kernel in the HW emulation (close to the real board)?

bests.

 

0 Kudos
Xilinx Employee
Xilinx Employee
1,332 Views
Registered: ‎09-08-2011

Re: Fpga slower than cpu

Jump to solution

1- what is the difference between Emulation time and Wall Clock Time?

 

In this context, i believe the Emulation time reflects how long it was estimated to run in. The Wall clock time is how long it took. The Emulation should be expected to run slower when measured how much real time it took from when the emulation kicked off to when the emulation finished when looking at not the time covered int he emulation but the time it took to run the emulation.

 

2. Is it any way to estimate the performance of kernel in the HW emulation (close to the real board)?

bests.

 

For the HW emulation we provide a fair bit of details in the profiling: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1023-sdaccel-user-guide.pdf which we cover the basics of in Chapter 3.

 

 

If at first you don't succeed, try redefining success?