12-12-2017 12:30 PM
12-12-2017 01:41 PM
This is a project in Xilinx Research Labs. Whatever you can find out there that is public you are welcome to. If you are with a university, you may wish to contact XUP (Xilinx University Program).
12-12-2017 01:48 PM
Ask your professor if your school is working with us on SYCL.
12-12-2017 01:52 PM
My school is not working with Xilinx.
Although, I have sent a request to XUP if they can help me with this topic.
01-08-2018 09:01 AM
I tried to contact the Xilinx University Program but they are not responding at all.
May I ask you if you can help me get a solution for this? a contact perhaps.
01-08-2018 09:12 AM
XUP responds to professors,
You need to ask a faculty member. Sorry about that, I did not see that you were a student when I suggested XUP contact.
06-21-2019 03:14 PM
We are working on a newer approach, since now there are more existing SYCL implementation around: https://github.com/triSYCL/sycl
But as already said, it is a research project and not a supported Xilinx product...