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Visitor ygchoi0521
Visitor
1,027 Views
Registered: ‎11-13-2017

SDAccel Host Processor Architecture

Hello! I'm newbie on Xilinx SDAccel Platform.

I'd like to setup SDAccel to evaluate HW acceleration of several softwares such as SQL, string match, text filter and so on.

 

According to ug1164, SDAccel is working on x86_64 architecture via PCIe bus.

Here is my question about SDAccel, "Does some way exist to executing SDAccel-generated Accelerator in ARM server?"

 

I've found Xilinx provides Linux kernel driver source codes such as xcldma driver, so it seems that I can port those code to ARM version.

However, I cannot sure about some user applications like XOCC and Runtimes.

Is it possible to execute SDAccel-generated Accelerator on ARM server? If possible, how to?

 

Please let me know about it.

 

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3 Replies
Scholar u4223374
Scholar
1,002 Views
Registered: ‎04-26-2015

Re: SDAccel Host Processor Architecture

Can you tell us more about this server (eg. how the FPGA is connected to it)?

 

The obvious "ARM + FPGA" server would be Zynq-powered, with the ARM and FPGA all in one chip. For this application there is a dedicated toolchain, SDSoC.

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Xilinx Employee
Xilinx Employee
997 Views
Registered: ‎08-01-2008

Re: SDAccel Host Processor Architecture

this tutorial may help you

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_1/ug1021-sdaccel-intro-tutorial.pdf
Thanks and Regards
Balkrishan
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Visitor ygchoi0521
Visitor
949 Views
Registered: ‎11-13-2017

Re: SDAccel Host Processor Architecture

Thank you for your comment.

 

In my development configuration, FPGA boards should be connected to an ARM processor via PCIe bus (for expandability).

I'm finding appropriate ARM server model, provided by Cavium, Qualcomm, AppliedMicro, etc.

 

Maybe SDSoC can be solution for early development stage, but my goal is expandability, so it cannot be solution for long period.

 

My final goal is building a system which contains an ARM processor, FPGA boards, a network card, and other many PCIe devices. All devices in the system should be connected to ARM processor's PCIe rootcomplex since ARM processor will manage operations of PCIe devices.

 

Can you give me some guides or tips to setup this kind of environment?

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