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343 Views
Registered: ‎05-31-2018

Xilinx FPGA access by multiple OpenCL based applications

We are using SDAccel runtime environment (2018.2, 2018.3) with VCU1525 Xilinx FPGA on PCIe interface. How do we use multiple separate application via OpenCL APIs to push their kernels onto a single FPGA board? 

It appears that only a single context (application) is able to create a clContext and hence a clCommandQueue(s) at a time. 

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Moderator
Moderator
293 Views
Registered: ‎11-04-2010

Re: Xilinx FPGA access by multiple OpenCL based applications

Please try to read the below material:

https://xilinx.github.io/XRT/2018.3/html/multiprocess.html

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-12-2017

Re: Xilinx FPGA access by multiple OpenCL based applications

Hi @e.ahmed-contractor 

 

You can achieve that by following below instructions, I assume you are using 2018.3

 

  1. Create a sdaccel.ini file in the directory where you planned to run your executable
  2. Enter following details
    1. [Runtime]
    2. multiprocess=true

 

If your bitstream contains multiple compute units, for example, 2 CUs, then two processes can access 2CUs independently by enabling following flags you will be able to target multiple applications utilizing FPGA for a particular task.

 

Thanks

Kali

 

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