UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Explorer
Explorer
3,928 Views
Registered: ‎08-26-2014

How to force 64 bits wide AXI connections on SDSoC?

Hello,

 

I have a function which will be executed in the PL which reads 6 floats and returns 6 floats. The width of the AXI connections (either ACP or HP) are obviously implemented using 32-bits.

 

Is there any way of making those connections 64 bits wide?

 

I have tried using long long pointers and then converting the pointer to float inside the IP but I get this error:

 

unsupported pointer reinterpretation from type 'i64*' to type 'float*' on variable 'inaddr'

Thanks,

 

Cerilet

0 Kudos
4 Replies
Teacher muzaffer
Teacher
3,880 Views
Registered: ‎03-31-2012

Re: How to force 64 bits wide AXI connections on SDSoC?

@cerilet have you tried

 

top(unsigned long long * memory, ...) {

 

 

unsigned long long local[3];

 

memcpy(local, memory, 24);

 

float fl[6];

fl[0] = *static_cast<float*>(local);

fl[1] = *(static_cast<float*>(local)+1);

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
0 Kudos
Xilinx Employee
Xilinx Employee
3,830 Views
Registered: ‎07-18-2014

Re: How to force 64 bits wide AXI connections on SDSoC?

I think you can also give a try to structure datatype to match 64bit wide data:

 

typedef struct {

      float data[2]; 

} float2;

 

void func_decl (float2* in, float2* out){

   for (int i = 0 ; i < size_of_input_data ; i++)

   {

          float2 input = in[i];

          float first = input.data[0];

          float second = input.data[1];

          ...

   }

};

0 Kudos
Explorer
Explorer
3,797 Views
Registered: ‎08-26-2014

Re: How to force 64 bits wide AXI connections on SDSoC?

Hi @muzaffer and @heeran,

 

None of those options worked.

 

@muzaffer's solution gives this error:

 

Pragma processor failed: ddr_test.cpp:19:11: error: static_cast from 'unsigned long long *' to 'float *' is not allowed
        in[0] = *static_cast<float*>(local);

Whilst @heeran's solution implements a 32-bit wide bus.

 

I have tried also simple cast in @muzaffer's option, but it doesn't work either. Even playing a bit with casting, the C compilation might work, but when I try the synthesis I get these errors:

 

ERROR: [SYNCHK 200-22] ddr_test.cpp:17: memory copy is not supported unless used on bus interface possible cause(s): non-static/non-constant local array with initialization).
ERROR: [SYNCHK 200-41] ddr_test.cpp:6: in function 'ddr_test': unsupported pointer reinterpretation from type '[3 x i64]*' to type 'i32' on variable 'local'.

It must be a way of implementing this.

0 Kudos
Xilinx Employee
Xilinx Employee
3,765 Views
Registered: ‎07-18-2014

Re: How to force 64 bits wide AXI connections on SDSoC?

I tried structure datatype (containing two floats) and was can see kernel DATAWIDTH to 64 bit wide. 

please refer attached source code "array_zero_copy.cpp" file. Its a zero copy example (no DMA). Kernel is directly connected to ACP interface of PS7 IP. This example is tested with 2016.3 SDx tool.

 

0 Kudos