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Visitor thibchap
Visitor
1,566 Views
Registered: ‎05-31-2017

SDSoC Platform Utility fails to generate reference design

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Hi everyone,

I'm rather new to SDSoC. I'm trying to create a new platform for SDSoC 2017.2, using UG1146. 

But, I run into an issue when following the "Tutorial: Using the SDSoC Platform Utility" page 46 (of UG1146). I'm using windows 10 and have SDSoC 2017.2 installed.

Basically, I try to regenerate the ZC702 platform from the sample files found at "C:\Xilinx\SDx\2017.2\samples\sdspfm" copied into another folder "C:\temp".

The SDx Terminal was launched as admin and cd to C:\temp (it doesn't have the permission to create the .Xil folder in root C:\ as it is advised in the tutorial).

 

Capture.PNG

 

Here is the error message when hitting Generate (sdspfm.log):

 

#(c) Copyright 2012-2016 Xilinx, Inc. All Rights Reserved.
#-----------------------------------------------------------
# Tool version : sdspfm 2017.1 SW Build 1972098 on Wed Aug 23 11:35:21 MDT 2017
# Start time : Thu Oct 19 10:09:25 +0200 2017
# Command line : sdspfm -gui
# Log file : C:/temp/sdspfm.log
# Journal file : C:/temp/sdspfm.jou
#-----------------------------------------------------------

INFO: [SdsPfm 83-5426] Starting GUI
java -Xms64m -Xmx512m -jar C:/Xilinx/SDx/2017.2/bin/sdspfm.jar sdspfm XPR
INFO: [SdsPfm 83-5406] Using user-defined path for XILINX_XD environment variable C:/Xilinx/SDx/2017.2
INFO: [SdsPfm 83-5429] Deleted existing output directory at 'C:/temp/outputs/zc702'
INFO: [SdsPfm 83-5411] Archiving vivado project


****** Vivado v2017.2_sdx (64-bit)
**** SW Build 1972098 on Wed Aug 23 11:34:46 MDT 2017
**** IP Build 1971916 on Wed Aug 23 13:11:02 MDT 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

INFO: [Common 17-1460] Use of init.tcl in C:/Xilinx/SDx/2017.2/Vivado/scripts/init.tcl is deprecated. Please use Vivado_init.tcl
Sourcing tcl script 'C:/Xilinx/SDx/2017.2/Vivado/scripts/init.tcl'
16 Beta devices matching pattern found, 16 enabled.
Loaded SDSoC Platform Tcl Library
open_project C:/temp/sdspfm/zc702/src/vivado/zc702.xpr
INFO: [Project 1-313] Project file moved from 'C:/Xilinx/SDx/2017.2/samples/sdspfm/zc702/src/vivado' since last save.
Scanning sources...
Finished scanning sources
WARNING: [filemgmt 56-2] IPUserFilesDir: Could not find the directory 'C:/temp/sdspfm/zc702/src/vivado/zc702.ip_user_files', nor could it be found using path 'C:/Xilinx/SDx/2017.2/samples/sdspfm/zc702/src/vivado/zc702.ip_user_files'.
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/SDx/2017.2/Vivado/data/ip'.
source archive_project.tcl -notrace
INFO: [Coretcl 2-137] starting archive...
INFO: [Coretcl 2-1499] Saving project copy to temporary location 'C:/temp/.Xil/.Xil/Vivado-11108-EISI' for archiving project
INFO: [Project 1-313] Project file moved from 'C:/Xilinx/SDx/2017.2/samples/sdspfm/zc702/src/vivado' since last save.
Scanning sources...
Finished scanning sources
WARNING: [filemgmt 56-2] IPUserFilesDir: Could not find the directory 'C:/temp/sdspfm/zc702/src/vivado/zc702.ip_user_files', nor could it be found using path 'C:/Xilinx/SDx/2017.2/samples/sdspfm/zc702/src/vivado/zc702.ip_user_files'.
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/SDx/2017.2/Vivado/data/ip'.
INFO: [Coretcl 2-1211] Creating project copy for archival...
INFO: [Coretcl 2-1213] Including run results for 'synth_1'
INFO: [Coretcl 2-1213] Including run results for 'impl_1'
INFO: [Coretcl 2-1209] Adding archive summary file to the project...
INFO: [Coretcl 2-1214] Preparing project files for archive...
INFO: [Coretcl 2-1210] Compressing project files and data...
INFO: [Coretcl 2-1215] Project archived (C:/temp/.Xil/zc702.xpr.zip)
INFO: [Coretcl 2-1216] To view the archive summary log in GUI, double click on 'Design Sources->Text->archive_project_summary.txt', or open this file from the archived project directory.
INFO: [Common 17-206] Exiting Vivado at Thu Oct 19 10:10:33 2017...
Archive: C:/temp/.Xil/zc702.xpr.zip
inflating: zc702/archive_project_summary.txt
creating: zc702/config_settings/
inflating: zc702/vivado.jou
inflating: zc702/vivado.log
creating: zc702/zc702.cache/compile_simlib/activehdl/
creating: zc702/zc702.cache/compile_simlib/ies/
creating: zc702/zc702.cache/compile_simlib/modelsim/
creating: zc702/zc702.cache/compile_simlib/questa/
creating: zc702/zc702.cache/compile_simlib/riviera/
creating: zc702/zc702.cache/compile_simlib/vcs/
inflating: zc702/zc702.cache/wt/project.wpc
inflating: zc702/zc702.hw/zc702.lpr
creating: zc702/reating: zc702/zc702.cache/compile_simlib/ies/
creating: zc702/zc702.cache/compile_simlib/modelsim/
creating: zc702/zc702.cache/compile_simlib/questa/
creating: zc702/zc702.cache/compile_simlib/riviera/
creating: zc702/zc702.cache/compile_simlib/vcs/
inflating: zc702/zc702.cache/wt/project.wpc
inflating: zc702/zc702.hw/zc702.lpr
creating: zc702/zc702.ipdefs/
inflating: zc702/zc702.srcs/sources_1/bd/zc702/hdl/zc702_wrapper.v
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_processing_system7_1_0/zc702_processing_system7_1_0.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_processing_system7_1_0/zc702_processing_system7_1_0.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_1_0/zc702_proc_sys_reset_1_0.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_1_0/zc702_proc_sys_reset_1_0.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_2_1/zc702_proc_sys_reset_2_1.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_2_1/zc702_proc_sys_reset_2_1.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_3_2/zc702_proc_sys_reset_3_2.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_3_2/zc702_proc_sys_reset_3_2.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_4_3/zc702_proc_sys_reset_4_3.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_proc_sys_reset_4_3/zc702_proc_sys_reset_4_3.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_xlconcat_1_0/zc702_xlconcat_1_0.xci
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ip/zc702_xlconcat_1_0/zc702_xlconcat_1_0.xml
inflating: zc702/zc702.srcs/sources_1/bd/zc702/ui/bd_d7ce4d0.ui
inflating: zc702/zc702.srcs/sources_1/bd/zc702/zc702.bd
inflating: zc702/zc702.srcs/sources_1/bd/zc702/zc702.bxml
inflating: zc702/zc702.srcs/sources_1/imports/hdl/zc702_wrapper.v
inflating: zc702/zc702.xpr
C:/Xilinx/SDx/2017.2/SDK/gnuwin/bin/chmod.exe -R 777 vivado
xsltproc --stringparam P_PF_NM zc702 -o zc702.xpr C:/Xilinx/SDx/2017.2/scripts/xsd/cleanup_xpr.xsl zc702.xpr
INFO: [SdsPfm 83-5430] Using DSA Flow
INFO: [SdsPfm 83-5409] Creating hardware platform XML file
vivado -mode batch -notrace -source create_hw_pfm.tcl C:/temp/.Xil/vivado/zc702.xpr


****** Vivado v2017.2_sdx (64-bit)
**** SW Build 1972098 on Wed Aug 23 11:34:46 MDT 2017
**** IP Build 1971916 on Wed Aug 23 13:11:02 MDT 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

INFO: [Common 17-1460] Use of init.tcl in C:/Xilinx/SDx/2017.2/Vivado/scripts/init.tcl is deprecated. Please use Vivado_init.tcl
Sourcing tcl script 'C:/Xilinx/SDx/2017.2/Vivado/scripts/init.tcl'
16 Beta devices matching pattern found, 16 enabled.
Loaded SDSoC Platform Tcl Library
open_project C:/temp/.Xil/vivado/zc702.xpr
INFO: [Project 1-313] Project file moved from '.' since last save.
Scanning sources...
Finished scanning sources
WARNING: [filemgmt 56-2] IPUserFilesDir: Could not find the directory 'C:/temp/.Xil/vivado/zc702.ip_user_files', nor could it be found using path 'C:/temp/.Xil/zc702.ip_user_files'.
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/SDx/2017.2/Vivado/data/ip'.
source create_hw_pfm.tcl -notrace
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_2
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_3
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_0
Adding cell -- xilinx.com:ip:processing_system7:5.5 - ps7
Adding cell -- xilinx.com:ip:xlconcat:2.1 - xlconcat
Successfully read diagram <zc702> from BD file <C:/temp/.Xil/vivado/zc702.srcs/sources_1/bd/zc702/zc702.bd>
INFO: [Vivado 12-4895] Creating DSA: zc702.dsa ...
ERROR: [Common 17-170] Unknown option '-origin_dir_override', please type 'write_project_tcl -help' for usage info.
ERROR: [Common 17-69] Command failed: ERROR: [Common 17-170] Unknown option '-origin_dir_override', please type 'write_project_tcl -help' for usage info.

INFO: [Common 17-206] Exiting Vivado at Thu Oct 19 10:10:45 2017...
ERROR: [SdsPfm 83-5451] Exiting sdspfm : Error when calling 'vivado -mode batch -notrace -source create_hw_pfm.tcl C:/temp/.Xil/vivado/zc702.xpr'
sdspfm log file saved as C:/temp/sdspfm.log
sdspfm completed at Thu Oct 19 10:10:45 +0200 2017

 

So is it a known issue with sdspfm version 2017.2 on Windows ? From what I've tried, I get a similar error with my own custom platform.

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1 Solution

Accepted Solutions
Explorer
Explorer
2,510 Views
Registered: ‎09-19-2017

Re: SDSoC Platform Utility fails to generate reference design

Jump to solution

Hi thibchap,

 

This is a problem with Vivado. If you look at your log, just before it fails, it launches Vivado. The problem lies in the ".Xilinx" directory that Vivado creates in your home directory (not sure exactly where it goes on Windows) and when you go from one Vivado (or SDSoC which uses Vivado) release to the next this folder doesn't always get cleaned up nicely. 

 

I had this problem also (although on Linux) and the fix is to delete that ".Xilinx" directory and then try again. 

 

Sam

3 Replies
Explorer
Explorer
2,511 Views
Registered: ‎09-19-2017

Re: SDSoC Platform Utility fails to generate reference design

Jump to solution

Hi thibchap,

 

This is a problem with Vivado. If you look at your log, just before it fails, it launches Vivado. The problem lies in the ".Xilinx" directory that Vivado creates in your home directory (not sure exactly where it goes on Windows) and when you go from one Vivado (or SDSoC which uses Vivado) release to the next this folder doesn't always get cleaned up nicely. 

 

I had this problem also (although on Linux) and the fix is to delete that ".Xilinx" directory and then try again. 

 

Sam

Visitor thibchap
Visitor
1,508 Views
Registered: ‎05-31-2017

Re: SDSoC Platform Utility fails to generate reference design

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Hi Sam,

 

Thanks for the answer! So I tried different things. First, I removed the "C:\Users\<UserName>\.Xilinx" directory in Windows (and made a copy for safety). But it didn't change anything.

 

Then I tried to install SDx in an Ubuntu/Linux virtual machine, and generate the platform, but it did the same error message. However, removing "~/.Xilinx" directory has actually worked!

So, I think that I will stick with Linux for the platform generation!

Thanks for your tips.

 

Thibault

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Contributor
Contributor
1,277 Views
Registered: ‎10-25-2017

Re: SDSoC Platform Utility fails to generate reference design

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On the Windows side you need to remove the C:\Users\<user_id>\AppData\Roaming\Xilinx directory

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