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Visitor rkedia20
Visitor
7,646 Views
Registered: ‎10-03-2015

Waveform dump from SDSoC

Hi,

I am using SDSoC tool and successfully able to synthesize functions on the hardware. But I want to get some more understanding of the transactions happening over between software and hardware and for this I want to observe the waveforms (activities at the boundary of the hardware module). Has anyone been able to do so and if yes, could you please guide me on the same?

 

--rajesh

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Xilinx Employee
Xilinx Employee
7,618 Views
Registered: ‎08-02-2011

Re: Waveform dump from SDSoC

Hi Rajesh,

You will need to open the IPI diagram and insert ILAs manually to see waveforms at this level. The project you want is in the SDDebug/_sds/p0/ipi directory.
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Visitor rkedia20
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7,607 Views
Registered: ‎10-03-2015

Re: Waveform dump from SDSoC

Hi,

 

Thanks for the quick response. I am aware of ILAs based approach, but I was thinking can we do better. I am not sure how many ILAs could I add, definitely it will be dependent on remaining number of logic in PL, right?

 

To give another use case, I am interested in calculating power details using IPI. As of now, I am able to get the vectorless information with the IPI project exported by SDSoC. I wanted to get more accurate power details by providing vector information. Could you suggest any other flow for this?

 

--rajesh

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Xilinx Employee
Xilinx Employee
7,601 Views
Registered: ‎08-02-2011

Re: Waveform dump from SDSoC

Hmmm, I don't personally have any other suggestions how to get that info. You might be better off waiting for someone else to respond or posting to one of the 'Programmable Devices' or 'Zynq All Programmable SoC' boards to get some more informed suggestions by folks who are more familiar with this kind of power testing than myself.

 

 

But to answer your specific question, yes you will be limited in the number of ILAs based on the amount of unused logic (usually BRAM is the limiting factor) you have leftover in the PL.

 

 

Simulation won't work because there is no way to simulate the PS running your full software stack.

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Xilinx Employee
Xilinx Employee
4,757 Views
Registered: ‎07-13-2012

Re: Waveform dump from SDSoC

Hardware/software event tracing is available in the 2016.1 release and provides a detailed view of what's happening in the system. The SDSoC environment trace view enables event tracing of software running on the processor, as well as hardware accelerators and data transfer links in the system.

 

For additional information on this feature, see the "Hardware/Software Event Tracing" chapter in the SDSoC Environment User Guide (UG1027) and the "Hardware/Software Event Tracing" tutorial in the SDSoC Environment Getting Started Guide (UG1028).

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