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Registered: ‎08-08-2017

reVision examples do not build: Requested invalid clock id

When trying to build the example project (optical flow) for the reVision platform I get the errors shown below. The clock options for the platform are (MHz) 299.97, 149.99, 74.99. For the example output shown below I have selected 299.97 for the DMA clock and accelerator functions, however I get the same errors regardless of which frequencies I use. Any ideas? 

 

C:\reVI\workspace\newP\Debug\_sds\.llvm>opt -disable-output -instcombine -mem2reg -basicaa -XidanePass --platform reVI --dmclkid 2 --repo C:/reVI/workspace/newP/Debug/_sds/.cdb/xd_ip_db.xml --dmdb C:/Xilinx/SDx/2017.1/data/DM.db -os linux -processor cortex-a53 0<sds_all.o
INFO: [DMAnalysis 83-4494] Analyzing hardware accelerators...
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 2 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform reVI
INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...
INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0
WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform reVI
Wrote crash dump file "C:\Users\John\AppData\Local\Temp\opt.exe-52cd87.dmp"
Assertion failed in "Z:\sdx17.1\src\products\sdx\soc\ext\llvm_clang\v3.9\src\lib\Transforms\Xidane\Resource.cpp", line 616
#0 0x00007ff7af84e605 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0x8de605)
#1 0x00007ffc9ea6db77 (C:\WINDOWS\System32\ucrtbase.dll+0x6db77)
#2 0x00007ffc9ea6ea01 (C:\WINDOWS\System32\ucrtbase.dll+0x6ea01)
#3 0x00007ff7afa06d62 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0xa96d62)
#4 0x00007ff7af9e85a2 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0xa785a2)
#5 0x00007ff7af9d647f (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0xa6647f)
#6 0x00007ff7af9af6ec (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0xa3f6ec)
#7 0x00007ff7af56da5f (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0x5fda5f)
#8 0x00007ff7af56d141 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0x5fd141)
#9 0x00007ff7aefc1137 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0x51137)
#10 0x00007ff7afc93344 (C:\Xilinx\SDx\2017.1\llvm-clang\win64\llvm\bin\opt.exe+0xd23344)
#11 0x00007ffca11a8364 (C:\WINDOWS\System32\KERNEL32.DLL+0x8364)
#12 0x00007ffca16a70d1 (C:\WINDOWS\SYSTEM32\ntdll.dll+0x670d1)
Data motion generation exited with return code -2
- exited unexpectedly
ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling 'C:/Xilinx/SDx/2017.1/bin/XidanePass --platform reVI --dmclkid 2 --repo C:/reVI/workspace/newP/Debug/_sds/.cdb/xd_ip_db.xml --dmdb C:/Xilinx/SDx/2017.1/data/DM.db -os linux -processor cortex-a53 '
sds++ log file saved as C:/reVI/workspace/newP/Debug/_sds/reports/sds.log
ERROR: [SdsCompiler 83-5004] Build failed

make: *** [newP.elf] Error 1

 

 

 

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4 Replies
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Voyager
Voyager
2,567 Views
Registered: ‎06-24-2013

Re: reVision examples do not build: Requested invalid clock id

Hey @dillon.gregerson

 

It seems to me the tools don't like your choice for the Data Motion Network Clock Frequency (dmclkid) on your platform (reVI). Try to select a different clock (SDSoC Project Overview Options).

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!
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2,539 Views
Registered: ‎08-08-2017

Re: reVision examples do not build: Requested invalid clock id

Hey @hpoetzl

Thanks for the reply. I have tried the 3 data motion clock frequencies provided by the platform and get the same errors each time. The console output below was for a build with data motion clock frequency set to 149.99 and hardware accelerator clock frequencies set to 74.99. I have also tried all the combinations of matching these frequencies.

 

WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1008] Requested invalid clock id 0 for platform reVI
WARNING: [DMAnalysis 83-1005] Invalid clock id 0 for platform reVI
INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...
INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0
WARNING: [DMAnalysis 83-1005] Invalid clock id 1 for platform reVI
Wrote crash dump file "C:\Users\John\AppData\Local\Temp\opt.exe-4512ed.dmp"

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Voyager
Voyager
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Registered: ‎06-24-2013

Re: reVision examples do not build: Requested invalid clock id

I guess those warnings are expected then ... anyway, your main problem is that the tools seem to terminate unexpectedly (crash) which can have a number of different reasons (Windows, Java, etc).

 

Hope it helps,

Herbert

-------------- Yes, I do this for fun!
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Visitor
Visitor
1,308 Views
Registered: ‎11-02-2017

Re: reVision examples do not build: Requested invalid clock id

I get the same message

 

WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform revision

WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform revision

WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform revision

INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...

INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0

WARNING: [DMAnalysis 83-1005] Invalid clock id 2 for platform revision

ERROR: [DMAnalysis 83-4503] No M_AXI_GP port found in the platform!

ERROR: [DMAnalysis 83-4445] Failed scheduling data transfer graph!

 

 

 

What is the fix?

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