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Explorer
Explorer
677 Views
Registered: ‎10-12-2018

Aurora cannot lock

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I have an Aurora-IP in blockdesign. The line-rate of aurora configured to 5Gbps.

I have a 100MHz, low jitter clock input on my (custom) board, which is connected to the transceiver reference clock input. My problem is that the gt_pll_lock_out is low and (therefore) there is no clock on user_clk_out.

I monitor the CORE_STATUS (channel_up, gt_pll_lock, hard_err, lane_up, mmcm_not_locked_out) pins of the Aurora-IP (with an ILA). Only the mmcm_not_locked_out is high, other pins (including gt_pll_lock) is low.

I instantiated two counters on the clock outputs of the IP. The first driven by gt_refclk1_out (100MHz), which counts as expected. (So the clock is on the reference clock pin.) The other counter driven by user_clk_out (78.125MHz), which stalls at zero.

We have checked that the MGTVCCAUX powered by an 1.8V source.

What should I check?

I use:

  • Vivado 2016.3
  • Win-7
  • 7Series Zynq (xc7z030sbg485-2) on a custom board.
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1 Solution

Accepted Solutions
Explorer
Explorer
660 Views
Registered: ‎10-12-2018

Re: Aurora cannot lock

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Now everything is working as expected.

The problem was that the init_clk depends on the user_clk_out, and therefore the mmcm could not lock. I connected the init_clk to an independent clock source and now the aurora can lock.

2 Replies
Explorer
Explorer
661 Views
Registered: ‎10-12-2018

Re: Aurora cannot lock

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Now everything is working as expected.

The problem was that the init_clk depends on the user_clk_out, and therefore the mmcm could not lock. I connected the init_clk to an independent clock source and now the aurora can lock.

Moderator
Moderator
636 Views
Registered: ‎05-02-2017

Re: Aurora cannot lock

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Hi @betontalpfa,

 

thanks for letting us know your able to solve the problem .

 

Chandra 

Regards
Chandra sekhar
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