02-12-2020 06:19 AM
For the 10GEMAC and 12G-SDI IP cores, do Xilinx publish a clock spec for the external clock sources that will be used to drive these cores?
02-12-2020 07:50 AM
If you're talking about the source for GT reference clocks, they are talked about in the GT user guides and a phase noise spec can be found in data sheet. Basically it has to be LVDS or LVPECL and meet the phase noise specs.
02-12-2020 04:08 PM
Just adding my two cents. Datasheet for your device should cover phase spec requirement for your GT REFCLK.
For example if you are using Kintex US+ GTH then refer to Table 55 for this information.
03-09-2020 11:51 PM