05-21-2020 01:03 PM
Hi,
In my current project I use a GTP transceiver. I would like to know if I could drive the GTREFCLK0 port of the GTPE2_COMMON module using the output from a PLLE2_BASE.I would use the output of IBUFDS_GTE2 to drive the input of the PLL module and not to drive the GTREFCLK0 port directly because my clock signal has a low frequency and I need to increase the frequency through the PLL to achieve the wanted transmision rate.
05-21-2020 10:53 PM - edited 05-21-2020 10:55 PM
Hello @dgoaranda
No, this usecase is not possible. You need to use external clock source for GTP reference clock.
Please note that GTP reference clock need to adhere Phase Noise requirement as mentioned by :
https://www.xilinx.com/support/answers/44549.html
Thanks & regards
Leo
05-21-2020 10:53 PM - edited 05-21-2020 10:55 PM
Hello @dgoaranda
No, this usecase is not possible. You need to use external clock source for GTP reference clock.
Please note that GTP reference clock need to adhere Phase Noise requirement as mentioned by :
https://www.xilinx.com/support/answers/44549.html
Thanks & regards
Leo
05-22-2020 11:52 AM