03-08-2019 01:38 AM
In the Eye scan obtained using IBERT, The vertical axis refers to voltage codes. So obtained voltage code*2 will provide the actual voltage. But my question is what does the horizontal axis represent? and what is Dwell BER ? How does it affect the eye scan. And what does the colours meant in Eye scan. Please help me with this.
03-08-2019 08:00 AM - edited 03-08-2019 08:25 AM
We don't typically convert the vertical back to voltage. We are typically just looking for at least 52 codes of clearance and ideally more that 60 (for UltraScale gt's with a dwell of 10e-9). The horizontal is the amount of timing margin you have in Unit Intervals (UI). So if you are at 10Gbps and have .3 clearance that would be a 100ps UI so the .3 would mean 30 ps. Dwell BER is the number of samples you take for each position of the chart. DWELL BER of 1e-9 would mean that the eyescan will check for the error rate of 1e-9 at each offset. To do this it will take 10e9 samples at each offset. For the horizontal we look for .26 to .3 UI of margin.
03-10-2019 09:39 PM - edited 03-10-2019 10:07 PM
So. If I change the dwell BER, the eye diagram will also change?.
I am really confused now. I know what is Unit interval in an eye-diagram. But if I consider the dwell bit error rate and the colour coding, I am not able to relate it to the Unit interval concept.
and regarding vertical codes to voltage conversion I am not convinced with your answer. I have found somewhere in Xilinx forum that vertical code * 2= voltage. I have attached the neccessary screenshot please do cross-verify weather it is proper or not.
03-11-2019 09:08 AM - edited 03-11-2019 09:09 AM
In general, if you take more samples the eye will get smaller. The BER dwell lets you set how many samples to take. Ideally you want to set the dwell to the BER you are interested in acheiving. Since that can can take too much time the eye mask is done for a BER dwell of 10E-9 and extrapolated to acheive a BER of 10E-15.
There is a conversion from codes to mv but I'm not sure how accurate it can be after the signal goes through equalization stages and an automatic gain control stage. The conversion is 1.6 mv/code on the GTY. See the eyescan_vs_range attribute in UG578 (other gt's have similar attributes.) My only point is that since the Eye Scan Mask is in codes that is the more useful measure. The mask is defined for the eyescan_vs_range setting of 00.
10-22-2020 07:47 PM
I am very glad found your reply about detailed codes and UI margin requirement when doing eye scan:
We are typically just looking for at least 52 codes of clearance and ideally more that 60 (for UltraScale gt's with a dwell of 10e-9).
To do this it will take 10e9 samples at each offset. For the horizontal we look for .26 to .3 UI of margin.
My questions are:
(1) Does this requirement also apply for UltrayScale+ GTH?
(2) Do PCIe,SGMII,USXGMII have same test margin requirement as they have different speed?
(3) Does any document mention this requirement? I cannot find them in many docs only find this message.
Looking forward for your replay, Thanks!
10-23-2020 12:17 AM
Hi @wangyuming ,
(2) I can't really tell if speed make's a difference but I think it's only important that your eye has enough margin, so that the system gets the right value.
(3) I've been working with Eye Scans for some time now but I've never found any documents about it. There are only several community posts that help you out. I think most of the time it's about finding your own margin to work with. Just have a look at the Serial Transceiver-Community and look through all the posts there or try to search for it (e.g. using "IBERT" or "eye scan").
10-23-2020 12:46 AM