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Visitor
Visitor
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Registered: ‎05-23-2020

FMC ZCU102

I am trying to connect my logic input and outputs to the DP M2C/C2M pins. However, Vivado I/O won't let me. Is there a reason?

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488 Views
Registered: ‎06-21-2017

What is the error message?  What pins are you using?  What is the voltage level of your signals?

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Visitor
Visitor
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Registered: ‎05-23-2020

I do not get an error. It is just that I would not get to choose any of the M2C/C2M DP io pins. For example F29 (FMC_HPC1_DP0_C2M_P) does not appear in the drop down menu for the i/o ports. When I try to write it to choose it anyways Vivado says "invalid placement site." The voltage in and out are 1.7 volts

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Moderator
Moderator
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Registered: ‎07-23-2015

@AliAlra  The DP M2C/C2M signals are part of the GTH transceiver signals and hence you can't select them in the I/O Ports window. These pins need to be configured when using the GT wizard or any IP' s using the GT's. 

For regular IO's that you need to configure, you need to use the LA pairs available for the 2 FMC's. 

Refer to Page#97 from UG1182  that describes the FMC connections

- Giri
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Visitor
Visitor
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Registered: ‎05-23-2020

Thank you. So I have an in and out using an SMA FMC. What’s the process to configure them. 

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Moderator
Moderator
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Registered: ‎07-23-2015

@AliAlra 

 So I have an in and out using an SMA FMC. What’s the process to configure them. 


Not sure what you mean by "in and out using an SMA FMC". Assuming you referring to an FMC card with SMA connectors on it and you plan to use it as an Input and Output. If so, look at the ZCU102 schematic, you will find that bank 65,66,67 pins connect to the 2 FMC connectors J4 and J5. 

Depending on which SMA connector on FMC card you plan to use, backtrack and check its connectivity on ZCU102. As long as it connects to the 3 banks above you will be able to configure it in the I/O Ports window

- Giri
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Keep conversing, give Kudos and Accept Solution when you get one.
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Visitor
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Registered: ‎05-23-2020

Sorry for not having a clear question. What I meant to say is that I have a vhdl code or a block in other words. That block has an input port and an output port which in actual implementation on the board is going to be through an SMA cable. I already have an FMC card for it. Assuming I am using M2C and C2M DP1 or anything else for1.7 volts, what blocks do I need to add to my design to be able to use the I/O port for DP1. Currently when I try to choose it from the I/O window after synthesis it won’t let me. 

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Moderator
Moderator
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Registered: ‎07-23-2015

@AliAlra You cannot use M2C/C2M DP1 to lock onto your RTL code in/out ports. Those are restricted for GT pins and you need to either use GT Wizard or an IP that utilizes the GT's. 

As I mentioned above, look at Bank 65,66,67 in the schematic to see which pins they get connected to on the FMC connector and use those pins to lock in the IO Ports window of your design. 

For e.g. net FMC_HPC1_LA09_P connects Pin#AE2 on bank 65 to pin D14 on J4 FMC. So use  AE2 pin in the IO Ports window to lock to your RTL code ports if you have an SMA connector connected to Pin D14 of your FMC.  

- Giri
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Keep conversing, give Kudos and Accept Solution when you get one.
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Visitor
Visitor
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Registered: ‎05-23-2020

I understand the LA pins and I already used them for something else. But the FMC card I have has SMAs in DP0:7 for both M2C and C2M while it has just regular pins for LA0:33. Can I integrate the GT pins with my design? If so then how? If there is a tutorial or manual that would really be helpful. Thank you

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Moderator
Moderator
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Registered: ‎07-23-2015

@AliAlra  


Can I integrate the GT pins with my design? If so then how? If there is a tutorial or manual that would really be helpful. 

If you mean to your regular Inputs/Outputs of your RTL code using IO standards (from your earlier posts) then nope. You can only use HP/HR/HD banks depending on your device. 

The GT's are dedicated for High-Speed Data transmission and support industry standard-specific protocols. Take a look at PG182

for more details. 

- Giri
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There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
Keep conversing, give Kudos and Accept Solution when you get one.
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Visitor
Visitor
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Registered: ‎05-23-2020

What I am trying to say is that is it possible to use the GT wizard IP to generate a block that take in the high-speed data and connect that to my RTL. In other words, having the IP in the middle. Or is it impossible to use the high-speed data transmission in my RTL (using the middle IP). 

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Teacher
Teacher
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Registered: ‎03-31-2012

>> What I am trying to say is that is it possible to use the GT wizard IP to generate a block that take in the high-speed data and connect that to my RTL. In other words, having the IP in the middle. Or is it impossible to use the high-speed data transmission in my RTL (using the middle IP). 

It is impossible to use the GT IP to drive/read the individual wires directly/independently at CMOS levels. You can't turn them into regular single ended IO. It's not possible.
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