10-10-2017 12:50 AM
I am actually working on a communication chain between a FPGA (Spartan 6) and a FT2232H chip. So, the goal is to send a file from PC to FPGA, store it in a FIFO memory and then receive the sent data to PC.
I am using the 245 fifo sync mode.
All is working fine, expect that I rarely have a lose of one byte that appears randomly.
So for example, when I send a packet of 512byte, i received well the 512byte but when I repeat this operations 200 times, I noticed that sometimes I only receive 511 byte and when I check where happens the lost byte, it happens randomly. And when I send a packet of 65.536 byte, again sometimes, I only received 65 535 byte.
The strange thing is that when a lose occurs, this is always one byte.
Can anyone help out me there to solve this problem ?
Attached you will find my VHDL code.
Thank you for your help !
10-10-2017 03:27 AM
It sounds odd to me that you are always loosing just one byte, regardless the packet dimension. This smells as a software error because if it were a TX/RX frequency issue you would see a continuous buffer error. In this case we are not in the correct forum.
In the read direction you might have a problem with the RD and WR FIFO pointers frequencies. In order to compensate for TX and RX local oscillator frequencies, you might use clock correction (this is typical of some 8B10B encoded channels) or you need the RXOUTCLK (the recovered clock) to read from the RX fabric interface.
Is it possible that the RX FIFO is over/underflowing? Please double check the status of the buffers by monitoring TX/RXBUFSTATUS. In some cases the clock correction density is not enough to compensate for the high ppm difference.