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ebradford
Observer
Observer
532 Views
Registered: ‎04-23-2019

GTH package delay

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Hello,

I am using GTH transceivers.

I want to minimize intra-pair skew in my layout.

Don't I need to know the package delays of the GTH pins?

If so, where can I find them?

Thanks,

Emmett

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jhua
Xilinx Employee
Xilinx Employee
496 Views
Registered: ‎06-01-2017

Hi @ebradford 

You can find the pin flight times in Vivado. See UG583 page 237.

https://www.xilinx.com/support/documentation/user_guides/ug583-ultrascale-pcb-design.pdf

 
Thanks,
Jessica
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1 Reply
jhua
Xilinx Employee
Xilinx Employee
497 Views
Registered: ‎06-01-2017

Hi @ebradford 

You can find the pin flight times in Vivado. See UG583 page 237.

https://www.xilinx.com/support/documentation/user_guides/ug583-ultrascale-pcb-design.pdf

 
Thanks,
Jessica
------------------------------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our
Versal Blogs
------------------------------------------------------------------------------------------------

View solution in original post