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Adventurer
Adventurer
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Registered: ‎05-07-2018

GTX 7 series transciever

Hi 

I used 7 series transciever for 10.24 Gbps ( 64 bit data width ) interface bitween 2 KC705 and It works excellent. Thanks Xilinx company for developing such IPcore.

But I have some issues with this IPcore in 3.2 Gbps - 20 bit data width. In simulation  recieved data (rx_data) is not true. I know about bit slip but rx_data is completely wrong even gt0_rxslide_i can not help in this settings. 

Also I have one special problem with this IPcore in 3.84 Gbps (32 bit data width), Simulation is good But occasionally when I write (program) bit file in KC705, rx_data is not true (it is not confirm tx_data even with bit slip). Is there something wrong with this Ipcore in low rate or data width except 64 bit???

 

Thanks alot for your time and consideration.

Best Regards 

 

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Moderator
Moderator
271 Views
Registered: ‎07-30-2007

Hard to say what could be going wrong.  Could you attach the *.XCI file for the designs that won't work?




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