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Adventurer
Adventurer
6,014 Views
Registered: ‎04-14-2016

GTZ DRP address for TXRATESEL

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Hello, I'm looking for TX/RXRATESEL and CORECNTL but found them not in the DRP address map. Does GTZ not support changing the PLL settings through DRP or did I overlooked them?

Thank you!

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1 Solution

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Moderator
Moderator
10,696 Views
Registered: ‎02-16-2010

Re: GTZ DRP address for TXRATESEL

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TX/RXRATESEL are port connections to GTZ. You can control them directly from your design.
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3 Replies
Adventurer
Adventurer
5,953 Views
Registered: ‎04-14-2016

Re: GTZ DRP address for TXRATESEL

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Hello,

Can someone for please tell me if it is basically possible to access the CPLL settings through DRP. The DRP address map does not contain these TX/RXRATESEL attributes, but maybe Xilinx has renamed them? I want to perform line rate change through this (for GTX and GTH I have already done it this way).

Thank you!

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Moderator
Moderator
10,697 Views
Registered: ‎02-16-2010

Re: GTZ DRP address for TXRATESEL

Jump to solution
TX/RXRATESEL are port connections to GTZ. You can control them directly from your design.
------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
------------------------------------------------------------------------------
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Adventurer
Adventurer
5,704 Views
Registered: ‎04-14-2016

Re: GTZ DRP address for TXRATESEL

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Thank you, I will look that up in the IP wizardor chanige the VHDL wrapper files to get access (hope first one works).

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