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Contributor
Contributor
355 Views
Registered: ‎03-04-2016

Generic GTY CHANNEL instantiation and reset FSM of GTY

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Dear Xilinx Community,

 

with the 7series transceivers (GTX) there was a possibility to generate a reset FSM for RX and TX of the GTX.

With thoose a more generic instantiation of GTX_CHANNEL primitive was possible with helper components like 'gtx_core_support', 'gtx_core_gt', etc.

 

Because I don't want to be limited to my settings in the IP core generation, I'd like to create a generic instantiation for the GTY transceivers in Virtex UltraScale+, too.

 

I've already found the GTYE4_CHANNEL.vhd file which can be used for primitive instantiation. 

To change data rates during operation I'd like to switch between QPLL and CPLL, too, which should be possible via DRP like in GTX.

The IP Wizard just focus on a single configuration (QPLL0, QPLL1 or CPLL).

If I want to change a bitwidth, clock frequency or amount of channels I've to regenerate the core for different settings, too.

I'd like to solve this using generics for a GTY_wrapper instance like the GTX wrapper provided for Virtex7 transceivers.

 

 

Are there any further helper components like a 'gty_core_support' and the implementations of the reset FSM available or I'm supposed to change the implementation of the GTX files?

 

Best regards,

  Michael

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1 Solution

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Moderator
Moderator
318 Views
Registered: ‎07-30-2007

Re: Generic GTY CHANNEL instantiation and reset FSM of GTY

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On the structural options tab of the GT wizard it give you the options of what to put in the core and what to put in the example design.  If you choose to put everything in the core will it generate a single entitiy similar to the GT channel that you could integrate into your design. It will contain all the reset state machines that will be contained internally so you don't have to deal with them.  This would be a much faster solution to what you are trying to accomplish. 

Any port that you want to change can be specified to be brought to the top level on the same structural tab.  Bring the DRP ports to the top to help with changing attributes for speed changes.

 




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2 Replies
Moderator
Moderator
319 Views
Registered: ‎07-30-2007

Re: Generic GTY CHANNEL instantiation and reset FSM of GTY

Jump to solution

On the structural options tab of the GT wizard it give you the options of what to put in the core and what to put in the example design.  If you choose to put everything in the core will it generate a single entitiy similar to the GT channel that you could integrate into your design. It will contain all the reset state machines that will be contained internally so you don't have to deal with them.  This would be a much faster solution to what you are trying to accomplish. 

Any port that you want to change can be specified to be brought to the top level on the same structural tab.  Bring the DRP ports to the top to help with changing attributes for speed changes.

 




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Don't forget to reply, kudo, and accept as solution
----------------------------------------------------------------------------


Contributor
Contributor
299 Views
Registered: ‎03-04-2016

Re: Generic GTY CHANNEL instantiation and reset FSM of GTY

Jump to solution

Hi Roy,

 

thanks for your hint! That's the stucture I was searching for.

 

I think there should be no problem to configure the interface of the GTY in a generic way (data bitwidth, pcomma value, etc.).

 

Best regards, 

  Michael

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