03-20-2019 08:58 AM
How to use kintex7 gtx to send SATA OOB signal. There are txcominit , txcomwake and comfinish three ports in TX OOB signal chapter in ug476. so sending OOB signal with nothing to do with txelecidle.what the patterns of oob signal? Should i send txcominit six pulse cycle or keep it high(keep txcominit = 1) until comfinish signal become high~？
03-21-2019 03:02 AM
hi firstname.lastname@example.org .
All communications between SATA host (FPGA) and device (hard disk drive) go through two pairs of differential wires. Providing reset and speed negotiation services between the two link partners through the uninitialized and synchronized link presents a unique challenge. This is addressed by using OOB signals. OOB signals are sequences of signal bursts and common mode idles. SATA-compatible devices can detect differential voltage levels to discern the presence and absence of the data signal. By evaluating the time duration of these patterns, the SATA host and device can determine the meaning of the received OOB sequence without having an established serial link.
Please see the below link :
03-24-2019 04:49 AM
In appx870 ,txelecidle signal is keeping high during the whole OOB process. And the signal of txcominit is keeping high 18’hA2 (‘d162)clock periods when in gen2. I don’t know how to calculate to get 18’hA2,what I thought Cuz for 150M clock,Cominit signal is composed of six 160UI pulse and 480UI idle,that means (16 + 48)*6 =‘d 384 clock periods.
03-24-2019 09:23 AM
hi email@example.com ,
can you explain your application in detail and aslo what are trying to achive