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Explorer
Explorer
283 Views
Registered: ‎03-16-2019

Low rate transceiver using native mode I/O

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I want to use HSSIO native mode for transceiving async data with a rate of 100 Mb/s.
I have downloaded and implemented xapp1274 for KCU105, In this project PLLE3_ADV is used for PLLClk of Bitslice controller this primitive doesn't support rates
lower than 300 Mhz so this doesn't work for me as I've read in xapp1274 document at page 10 whenever I want to use
bit-slice in low rate (lower than 300 Mb/s) I must use MMCM instead of PLL and connect output of MMCM to the Refclk of bit-slice controller. I've tried this Eventually, after some attempts, I faced with this error in generating the bitstream, "When using the BITSLICE_CONTROL with the REFCLK input, RXTX_BITSLICE and TX_BITSLICE are not supported."
in AR# 69694 Xilinx clearly states that I can not use MMCM for my tx bit slice. from my point of view, these two(bold) sentences are in contrast.

my question is that, how can I use RX and Tx Bitslice for transceiving data with a rate of 100 Mb/s.

xapp1274 link: https://www.xilinx.com/support/documentation/application_notes/xapp1274-native-high-speed-io-interfaces.pdf
AR# 69694 Link: https://www.xilinx.com/support/answers/69694.html

 

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Explorer
Explorer
128 Views
Registered: ‎03-16-2019

Re: Low rate transceiver using native mode I/O

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I finally find out that for lowering the rate of the transceiving data after changing only the Rx source clock to MMCM, you should change the xapp1274 RIU. I have reached successfully to my goal and now I can run the xapp1274 from 37 MHZ to 1.25GHZ bit rate.

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Adventurer
Adventurer
198 Views
Registered: ‎08-01-2017

Re: Low rate transceiver using native mode I/O

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Have you tried to use MMCM instead of PLL and connect its output to the PLLCLK of BITSLICE? 

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Explorer
Explorer
172 Views
Registered: ‎03-16-2019

Re: Low rate transceiver using native mode I/O

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I tried this but I saw a similar error on bitstream generation. the error that refers to  AR# 69694.

I don't know, what should I do to have 100 Mb/s line rate with native-io?

 

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Explorer
Explorer
129 Views
Registered: ‎03-16-2019

Re: Low rate transceiver using native mode I/O

Jump to solution

I finally find out that for lowering the rate of the transceiving data after changing only the Rx source clock to MMCM, you should change the xapp1274 RIU. I have reached successfully to my goal and now I can run the xapp1274 from 37 MHZ to 1.25GHZ bit rate.

0 Kudos