M.2 SATA with P/N PIN connecting reversed

[nwpu310]

I would like to use PS SATA port of XCzu4ev on my own design,but i made a mistake:

SATA_RXP connected to Pin_43,and SATA_RXN connected to PIN_41,(EVM board ZCU4E connect SATA_RXP to PIN_41 of M.2 connector),i referred to M.2-FMC adapter board[AB17-M2FMC] and mistaken P/N order of RX ports.

any idea to fix the problem？

[nwpu310]

one of PS-GTR transveivers features(page 789 of UG1085 ):

D+/D- lane reversal for flexible board integration.

with this feature ,mistaken P/N order does not seem to be a problem.

How to reverse P/N order? 

[kenkovaa · Accepted solution]

Check the registers L<x>_TX_ANA_TM_13 and L<x>_TM_MISC1 in the SERDES registers for polarity swap (https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html  and  SERDES module)

--Kim

[nwpu310]

Hi，

there are four gtr lanes and only one control bit, so if i set bit[7] of L0_TM_MISK1 , all the four gtr_rx lanes are P/N flipped?

[eschidl]

Hi @nwpu310,

each lane has its own register set --> L0_*, L1_*, L2_*, L3_*.

I think @kenkovaa mentioned that already.