05-24-2021 04:30 AM
Hi, I'm trying to work develop my board using Zynq Ultrascale+ but I can't find and guidelines for SFP from xilinx about SFP PCB layout. There are other interfaces layout guidelines(DDR, PCIe(mentioned in eval boards user guide),HDMI) but not for SFP. Can someone tell from where I can get those guidelines or what guidelines should I follow to design SFP PCB with Ultrascale+?
05-24-2021 05:34 AM
Simply, on the board you are placing a cage for the SPF to fit into,
the layout is point to point but at very high speed,
look at the particular SFP your looking to use, they should have more info on needs.
06-28-2021 10:55 PM
Thanks for your reply. I'm trying to use SFP25 or SFP+ on my layout. But I can't find any solid layout guideline from any of Xilinx platform.
In UG-578, it is mentioned that use mode for GTY is SFF-8431 (SFP+) and in SFF-8431 document it is mentioned to use 100ohm trace impedance for SFP+. I'm not sure if it is okay with Xilinx FPGAs or not.
Can somebody please tell me what should be layout guidelines for SFP+ and SFP25 trace for Xilinx. Or recommend me some document where it has been mentioned.
Thanks in advance.
06-29-2021 01:46 AM
So the SFP+ are not Xilinx parts, they are made by many people and are almost a standard.
what you need to do is do a search for SFP+ layout guides,
I have just done so and the top 20 results all look like good guides to me,