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Scholar
Scholar
498 Views
Registered: ‎06-23-2014

PCIe pin connectivity testing

I have a custom board that has worked in the past, but a couple new production boards won't connect to the host over PCIe.  I am concerned that the Kintex-7 325T balls aren't soldered well and so there might be connectivity problems for the signals.  For all kinds of other pins in the past, I have simply sent out a set of known frequencies, a different one per pin, in order to test a board for proper manufacture.  For these PCIe pins, I'm not getting anywhere yet while trying to do the same thing.

It's been a few months since I've worked with PCIe... I get "rusty" fast.  Also, I've NEVER worked with these pins on the lowest level.  I've only done something above the Xilinx PCIe IP, or above Xillybus.

I can't spend too much time trying to recover these boards.  It's a board-cost vs labor-cost tradeoff, but I don't need to be seeing 30% yield on future production!

So, what's the fastest and easiest way to check for PCIe pin connectivity?  I'd prefer to disconnect the board from the PCIe bus, power it up independently, and then scope output lines or frequency-generator-push input lines. For the output pins, I'd prefer to just ship eight different fixed frequencies out the eight lanes.  For the input pins, I'd prefer to receive them in and route them to some misc generic output pins I have, so that I can scope those and see if what I see matches my frequency generator.  HOWEVER, all the doc I find just looks like a deep dark rabbit hole that I'd rather not leap into.  I'm in the process of experimenting with the Series 7 Transceiver Wizard, but I have no clue for how to set the myriad settings.

Is there just possibly a faster and easier way to do this testing?  I don't want the system to have to train or do anything else.  I'm just looking for DC connectivity!

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Moderator
Moderator
471 Views
Registered: ‎07-30-2007

Re: PCIe pin connectivity testing

With the board powered on you can simply check the impedance RXP to RXN with an ohmmeter.  (It works even with board powered on).  With the part configured it should be ~100.  If there are continuity problems you would see it.  If the pins are damaged it usually shows up in this measurement as well. Before configuration with the board powered up it should be more like ~135 ohms.  Make sure you are on the FPGA side of the ac coupling caps when measuring.




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Scholar
Scholar
455 Views
Registered: ‎06-23-2014

Re: PCIe pin connectivity testing

LOL. And I was just talking to my associate about how "conservation of energy" calculations are so much faster, by orders of magnitude, than detailed physics calculations. Here you've shown the same thing. No firmware, no wizards, no nuthin'... just a multimeter! Thanks!
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Xilinx Employee
Xilinx Employee
392 Views
Registered: ‎10-19-2011

Re: PCIe pin connectivity testing

Hi @helmutforren ,

AR54140 might help you additionally.

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Scholar
Scholar
377 Views
Registered: ‎06-23-2014

Re: PCIe pin connectivity testing

Thanks, @eschidl .  The information I assume from the AR is of additional use, indeed.

FYI, that AR leaves two items ambiguous.  Are those values OHMS that are read against GROUND?  (@roym 's advice was BETWEEN pins, but this AR with a different value per pin can't be between pins.)  I left negative feedback on the AR asking for clarification.  It's nice to be sure...

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Xilinx Employee
Xilinx Employee
372 Views
Registered: ‎10-19-2011

Re: PCIe pin connectivity testing

Hi @helmutforren ,

the values are in Ohm and it was a differential measurement, TXP <-> TXN and RXP <-> RXN.

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Scholar
Scholar
354 Views
Registered: ‎06-23-2014

Re: PCIe pin connectivity testing

Doh!  I see it better now.  I just saw the two Tx and Rx columns, and was thinking single-ended.  Not enough sleep.  Thanks for the clarification.  Now it's the same measurement as @roym .  I do still suggest the clarification in the AR.  (I do indeed know how differential signals work, LOL)

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Xilinx Employee
Xilinx Employee
343 Views
Registered: ‎10-19-2011

Re: PCIe pin connectivity testing

@helmutforren,

no worries :)

enjoy the weekend

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Scholar
Scholar
244 Views
Registered: ‎06-23-2014

Re: PCIe pin connectivity testing

@candelaria , for the sake of others, please clarify in detail.  When I read your post, I wonder if you're replying on the correct thread, LOL!  What GPU?  Don't have one.  What 8-pin connector?  Don't have one.  Which "those added wires" are you talking about?????

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Registered: ‎01-08-2012

Re: PCIe pin connectivity testing

Despite what AR#54140 says, any compliant PCIe interface will have AC coupling (i.e. series capacitors) on its Tx data lines.  If you probe on the edge connector, you will read an open on the Tx lines.  If you're careful, you should be able to locate the capacitors and probe on the "FPGA"-side of them to see the resistances mentioned in AR#54140.

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Scholar
Scholar
199 Views
Registered: ‎06-23-2014

Re: PCIe pin connectivity testing

Yes, we know about the caps.

Now my problem is that the engineer on site is afraid to touch the board with a multimeter due to the injected voltage/current when reading resistance...

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Explorer
Explorer
178 Views
Registered: ‎08-14-2013

Re: PCIe pin connectivity testing

Easiest way to generate/receive fixed frequencies would be to abuse the transceivers a bit. Generate transceiver cores at some reasonable line rate operating in raw mode, then grab all of the input pins, tie them together, and connect them to the output of a counter running in the txusrclk2 domain. Use different counter lengths for each channel, and you'll a nice set of square waves. In the receive direction, I think you can just connect one of the data pins on each channel to each GPIO pin. A bit hackish, but it should probably work well enough for some basic probing.
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