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Contributor
Contributor
2,016 Views
Registered: ‎09-01-2015

PIXCO settings for XAPP1308 HSYNC Sychronization

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On our existing SDI video products, we are now adding genlock.  This has led me to trying to implement XAPP1308.   I am currently getting the Saturation of the low pass filter integrator and output errors (OVF_INT, OVF_VOLT) and the clock does not appear to be syncing.  See below for my settings and the flagged error and the frequency response estimate for my settings.  Any help troubleshooting this would be appreciated.

 

freq_response.jpg

 

VIO.jpg

 

 

 

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Contributor
Contributor
2,330 Views
Registered: ‎09-01-2015

Ok, thanks everyone.  I have it working. Table 1 in XAPP1308 was confusing things, but I needed to tie VSIGCE_O to VSIGCE_I per figure 7.

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Contributor
Contributor
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Registered: ‎09-01-2015

I changed the gain settings to improve the frequency response, but I am still getting the overflows.

 

freq_response2.jpg

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Mentor
Mentor
1,998 Views
Registered: ‎02-24-2014

you are running your phase detector at a really low frequency (13.4 KHz), and your loop bandwidth is comparable..   That's simply not stable..    your phase detector frequency has to be at least 3 or 4 times your loop bandwidth, otherwise your loop will jump around like a crazy monkey.     If I were you,  I'd try to make the divider R as small as possible (ideally 1) and adjust the intermediate frequencies needed for V and the upstream PIXCO.  

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Xilinx Employee
Xilinx Employee
1,996 Views
Registered: ‎11-29-2007

hello

assuming that you have implemented the PICXO using the required encrypted tcl code (this ensures the correct timing), there are limitations on the max ppm range you can achieve with the PICXO. If the ppm difference between RXOUTCLK and TXOUTCLK is too high, it is possible that the control will saturate, no matter of the low pass filter you will use.

 

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Contributor
Contributor
1,990 Views
Registered: ‎09-01-2015

I am taking the V and R values directly from XAPP1308 table 2 for the 1080p59.94 video stndard. 

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Mentor
Mentor
1,982 Views
Registered: ‎02-24-2014

Then try increasing G1 and G2 to reduce the bandwidth.  

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Contributor
Contributor
1,980 Views
Registered: ‎09-01-2015

I have been playing with that without much success.  I will try that once again.

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Contributor
Contributor
1,972 Views
Registered: ‎09-01-2015

I am using it as packaged component downloded from the APP note, so I assume taht contains any needed TCL scripts.

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Contributor
Contributor
2,331 Views
Registered: ‎09-01-2015

Ok, thanks everyone.  I have it working. Table 1 in XAPP1308 was confusing things, but I needed to tie VSIGCE_O to VSIGCE_I per figure 7.

View solution in original post

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Observer
Observer
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Registered: ‎08-19-2019

What is the max ppm difference?

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