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Observer zvs
Observer
74 Views
Registered: ‎04-08-2017

RXUSRCLK and RXUSRCLK2 driven by an external synchronous clock

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Hi!

I had posted a question several days ago, but it looks like it had been missed. Here's a link: https://forums.xilinx.com/t5/Serial-Transceivers/feeding-RXUSRCLK-and-RXUSRCLK2-with-the-common-sys-clock/td-p/992744.

Can you help me with it, please?

Regards, Victor.

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1 Solution

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Moderator
Moderator
64 Views
Registered: ‎07-30-2007

Re: RXUSRCLK and RXUSRCLK2 driven by an external synchronous clock

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For 7-series the rule is that the RXUSRCLK's must be based on the same crystal that is generating the RX input.  You seem to be following the rule.  (This rule doesn't apply if you use clock correction)  In the case where the output clock of the FPGA is indirectly driving the refclk the external PLL will have to clean up the reference to meet the jitter (phase noise) specs. 

In general it is not a good idea to generate a system clock off of an MMCM as state machines need free running clocks.  See the sysclk definition in PG168.  You could run the refclk to the RXUSRCLK without and MMCM if it was the right frequency as is often the case and in any case you could drive the sysclk from the refclk before it hits the MMCM.

Try not to reply to your own question as that makes it look like it has been answered.  You can edit your original post instead.

 

Roy


----------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution
----------------------------------------------------------------------------


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2 Replies
Moderator
Moderator
65 Views
Registered: ‎07-30-2007

Re: RXUSRCLK and RXUSRCLK2 driven by an external synchronous clock

Jump to solution

For 7-series the rule is that the RXUSRCLK's must be based on the same crystal that is generating the RX input.  You seem to be following the rule.  (This rule doesn't apply if you use clock correction)  In the case where the output clock of the FPGA is indirectly driving the refclk the external PLL will have to clean up the reference to meet the jitter (phase noise) specs. 

In general it is not a good idea to generate a system clock off of an MMCM as state machines need free running clocks.  See the sysclk definition in PG168.  You could run the refclk to the RXUSRCLK without and MMCM if it was the right frequency as is often the case and in any case you could drive the sysclk from the refclk before it hits the MMCM.

Try not to reply to your own question as that makes it look like it has been answered.  You can edit your original post instead.

 

Roy


----------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution
----------------------------------------------------------------------------


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Observer zvs
Observer
54 Views
Registered: ‎04-08-2017

Re: RXUSRCLK and RXUSRCLK2 driven by an external synchronous clock

Jump to solution

Thanks a lot for the reply, Roy.

Regards, Victor. 

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